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a36e87127a
The STM32MP13xx SRAM size is half that the SRAM size on STM32MP15xx, disable early dcache start on STM32MP13xx as the TLB itself takes about a quarter of the SPL size. The dcache will be enabled later, once DRAM is available and TLB can be placed in DRAM. Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>