Jagan Teki 5bf3f3dd11 mtd: spi-nor: Enable QE bit for ISSI flash ...

Enable QE bit for ISSI flash chips.

QE enablement logic is similar to what Macronix
has, so reuse the existing code itself.

Cc: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

2020-04-30 22:34:20 +05:30

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bbm.h

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cfi.h

mtd: spi: Port SPI NOR framework from Linux

2019-02-07 15:33:21 +05:30

concat.h

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doc2000.h

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flashchip.h

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fsl_upm.h

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fsmc_nand.h

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mtd.h

mtd: Rename free() to rfree()

2020-02-05 19:33:46 -07:00

nand_bch.h

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nand_ecc.h

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nand.h

mtd: nand: Pass mode information to nand_page_io_req

2018-09-20 20:10:49 +05:30

ndfc.h

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omap_elm.h

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omap_gpmc.h

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onenand_regs.h

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onenand.h

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partitions.h

mtd: mtdpart: implement proper partition handling

2018-10-02 22:12:32 +05:30

rawnand.h

mtd: nand: provide several helpers to do common NAND operations

2019-04-22 11:55:58 -04:00

samsung_onenand.h

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spi-nor.h

mtd: spi-nor: Enable QE bit for ISSI flash

2020-04-30 22:34:20 +05:30

spinand.h

mtd: spi-nand: Import Toshiba SPI-NAND support

2020-04-29 01:44:35 +05:30

st_smi.h

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ubi.h

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