Cem Tenruh 7a478c836a board: phytec: phycore_imx8mm: Update lpddr4_timing ...

Update RAM Timings for 2GB RAM based on DDR Controller Configuration
Spreadsheet revision 22. Including the update of the refresh
rate to workaround errata ERR050805.

Signed-off-by: Cem Tenruh <c.tenruh@phytec.de>

2023-07-13 11:29:40 +02:00

..

imximage-8mm-sd.cfg

imx: Don't define __ASSEMBLY__ in source files

2022-02-08 23:07:58 -05:00

Kconfig

board: phytec: imx8mm-phycore: Switch to binman

2021-10-20 15:10:13 +02:00

lpddr4_timing.c

board: phytec: phycore_imx8mm: Update lpddr4_timing

2023-07-13 11:29:40 +02:00

MAINTAINERS

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Makefile

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phycore-imx8mm.c

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spl.c

ARM: imx8m: phycore_imx8mm: Drop bogus spl_board_init()

2022-10-21 11:54:12 +02:00