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The driver currently requires the bit clock divider be hardcoded in devicetree (or use the hardcoded default from apq8016). The bit clock divider is used to derive the baud rate from the core clock: baudrate = clk_rate / csr_div clk_rate is the actual programmed core clock rate which is returned by clk_set_rate(), and this UART driver only supports a baudrate of 115200. We can therefore determine the appropriate value for UARTDM_CSR by iterating over the possible values and finding the one where the equation above holds true for a baudrate of 115200. Implement this logic and drop the non-standard DT bindings for this driver. Tested on dragonboard410c. Tested-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Device Tree Bindings Staging Area ================================= This directory contains device tree bindings for U-Boot. These follow along with Linux kernel bindings, with a few additions. By adding the files here, U-Boot patches can clearly show thees additions. This makes it easier for device tree people to review these additions in patches sent to the U-Boot mailing list. The intent IS to commit these files to U-Boot. Hopefully at some point the files will be stored in another repo (shared with Linux) which is brought in as needed. Changes here are intended to mirror changes in the Linux Documentation/devicetree/bindings/ directory. sjg@chromium.org 17-Jan-12