mirror of
				https://source.denx.de/u-boot/u-boot.git
				synced 2025-10-26 14:01:50 +01:00 
			
		
		
		
	Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
		
			
				
	
	
		
			50 lines
		
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			50 lines
		
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
 | |
|  * Copyright 2010 Freescale Semiconductor, Inc.
 | |
|  *
 | |
|  * SPDX-License-Identifier:	GPL-2.0+
 | |
|  */
 | |
| 
 | |
| #include <config.h>
 | |
| #include <common.h>
 | |
| #include <asm/io.h>
 | |
| #include <asm/immap_85xx.h>
 | |
| #include <asm/fsl_serdes.h>
 | |
| 
 | |
| #define SRDS1_MAX_LANES		8
 | |
| 
 | |
| static u32 serdes1_prtcl_map;
 | |
| 
 | |
| static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = {
 | |
| 	[0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
 | |
| 	[0x4] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1},
 | |
| 	[0x5] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
 | |
| 	[0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1},
 | |
| 	[0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1},
 | |
| };
 | |
| 
 | |
| int is_serdes_configured(enum srds_prtcl prtcl)
 | |
| {
 | |
| 	return (1 << prtcl) & serdes1_prtcl_map;
 | |
| }
 | |
| 
 | |
| void fsl_serdes_init(void)
 | |
| {
 | |
| 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 | |
| 	u32 pordevsr = in_be32(&gur->pordevsr);
 | |
| 	u32 srds1_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >>
 | |
| 				MPC85xx_PORDEVSR_IO_SEL_SHIFT;
 | |
| 	int lane;
 | |
| 
 | |
| 	debug("PORDEVSR[IO_SEL] = %x\n", srds1_cfg);
 | |
| 
 | |
| 	if (srds1_cfg >= ARRAY_SIZE(serdes1_cfg_tbl)) {
 | |
| 		printf("Invalid PORDEVSR[IO_SEL] = %d\n", srds1_cfg);
 | |
| 		return ;
 | |
| 	}
 | |
| 
 | |
| 	for (lane = 0; lane < SRDS1_MAX_LANES; lane++) {
 | |
| 		enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds1_cfg][lane];
 | |
| 		serdes1_prtcl_map |= (1 << lane_prtcl);
 | |
| 	}
 | |
| }
 |