mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2025-08-24 08:01:21 +02:00
Add sysreset driver for cv1800b SoC Signed-off-by: Kongyang Liu <seashell11234455@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
33 lines
1.5 KiB
Makefile
33 lines
1.5 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0+
|
|
#
|
|
# (C) Copyright 2016 Cadence Design Systems Inc.
|
|
|
|
obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset-uclass.o
|
|
obj-$(CONFIG_ARCH_ASPEED) += sysreset_ast.o
|
|
obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o
|
|
obj-$(CONFIG_ARCH_STI) += sysreset_sti.o
|
|
obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o
|
|
obj-$(CONFIG_SYSRESET_CV1800B) += sysreset_cv1800b.o
|
|
obj-$(CONFIG_POWEROFF_GPIO) += poweroff_gpio.o
|
|
obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o
|
|
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_MAX77663) += sysreset_max77663.o
|
|
obj-$(CONFIG_SYSRESET_MPC83XX) += sysreset_mpc83xx.o
|
|
obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o
|
|
obj-$(CONFIG_SYSRESET_OCTEON) += sysreset_octeon.o
|
|
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_PALMAS) += sysreset_palmas.o
|
|
obj-$(CONFIG_SYSRESET_PSCI) += sysreset_psci.o
|
|
obj-$(CONFIG_SYSRESET_SBI) += sysreset_sbi.o
|
|
obj-$(CONFIG_SYSRESET_SOCFPGA) += sysreset_socfpga.o
|
|
obj-$(CONFIG_SYSRESET_SOCFPGA_SOC64) += sysreset_socfpga_soc64.o
|
|
obj-$(CONFIG_SYSRESET_TEGRA) += sysreset_tegra.o
|
|
obj-$(CONFIG_SYSRESET_TI_SCI) += sysreset-ti-sci.o
|
|
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_TPS65910) += sysreset_tps65910.o
|
|
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_TPS80031) += sysreset_tps80031.o
|
|
obj-$(CONFIG_SYSRESET_SYSCON) += sysreset_syscon.o
|
|
obj-$(CONFIG_SYSRESET_WATCHDOG) += sysreset_watchdog.o
|
|
obj-$(CONFIG_SYSRESET_RESETCTL) += sysreset_resetctl.o
|
|
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_AT91) += sysreset_at91.o
|
|
obj-$(CONFIG_$(SPL_TPL_)SYSRESET_X86) += sysreset_x86.o
|
|
obj-$(CONFIG_SYSRESET_RAA215300) += sysreset_raa215300.o
|
|
obj-$(CONFIG_TARGET_XTFPGA) += sysreset_xtfpga.o
|