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3607a8084a
Add Reset Manager driver support for Stratix SoC Signed-off-by: Chin Liang See <chin.liang.see@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
42 lines
873 B
C
42 lines
873 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2013 Altera Corporation <www.altera.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/reset_manager.h>
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#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
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#include <asm/arch/mailbox_s10.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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#if !defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
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static const struct socfpga_reset_manager *reset_manager_base =
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(void *)SOCFPGA_RSTMGR_ADDRESS;
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#endif
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/*
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* Write the reset manager register to cause reset
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*/
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void reset_cpu(ulong addr)
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{
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/* request a warm reset */
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#if defined(CONFIG_TARGET_SOCFPGA_STRATIX10)
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puts("Mailbox: Issuing mailbox cmd REBOOT_HPS\n");
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mbox_reset_cold();
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#else
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writel(1 << RSTMGR_CTRL_SWWARMRSTREQ_LSB,
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&reset_manager_base->ctrl);
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#endif
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/*
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* infinite loop here as watchdog will trigger and reset
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* the processor
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*/
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while (1)
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;
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}
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