Dirk Eibach 44876bf9e8 arm: mvebu: Fix ddr3_init() cpu config ...

Armada 38x has a maximum of two cores. Probably copy/paste
bug from Armada XP.

Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>

2016-03-24 09:36:40 +01:00

..

ddr3_a38x_mc_static.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_a38x_topology.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_a38x_training.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_a38x.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_a38x.h

arm: mvebu: a38x: Remove unsupported topologies

2015-11-17 23:41:41 +01:00

ddr3_debug.c

arm: mvebu: ddr: Fix compilation warning

2016-01-14 14:08:59 +01:00

ddr3_hws_hw_training_def.h

arm: mvebu: Fix SAR1_CPU_CORE_MASK

2015-11-17 23:41:41 +01:00

ddr3_hws_hw_training.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_hws_hw_training.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_hws_sil_training.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_init.c

arm: mvebu: Fix ddr3_init() cpu config

2016-03-24 09:36:40 +01:00

ddr3_init.h

bitops: introduce BIT() definition

2015-09-11 17:15:32 -04:00

ddr3_logging_def.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_patterns_64bit.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_topology_def.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_bist.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_centralization.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_db.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_hw_algo.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_hw_algo.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip_bist.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip_centralization.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip_db.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip_def.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip_engine.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip_engine.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip_flow.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip_pbs.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip_prv_if.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip_static.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_ip.h

arm: mvebu: ddr: Fix compilation warning

2016-01-14 14:08:59 +01:00

ddr3_training_leveling.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_leveling.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_pbs.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training_static.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr3_training.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr_topology_def.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

ddr_training_ip_db.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

Makefile

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

silicon_if.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

xor_regs.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

xor.c

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00

xor.h

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

2015-07-23 10:38:44 +02:00