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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
68 lines
1.5 KiB
C
68 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2017 Intel Corporation
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*/
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#include <common.h>
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#include <dm.h>
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#include <ns16550.h>
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#include <serial.h>
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/*
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* The UART clock is calculated as
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*
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* UART clock = XTAL * UART_MUL / UART_DIV
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*
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* The baudrate is calculated as
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*
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* baud rate = UART clock / UART_PS / DLAB
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*/
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#define UART_PS 0x30
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#define UART_MUL 0x34
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#define UART_DIV 0x38
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static void mid_writel(struct ns16550_plat *plat, int offset, int value)
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{
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unsigned char *addr;
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offset *= 1 << plat->reg_shift;
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addr = (unsigned char *)plat->base + offset;
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writel(value, addr + plat->reg_offset);
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}
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static int mid_serial_probe(struct udevice *dev)
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{
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struct ns16550_plat *plat = dev_get_plat(dev);
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/*
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* Initialize fractional divider correctly for Intel Edison
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* platform.
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*
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* For backward compatibility we have to set initial DLAB value
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* to 16 and speed to 115200 baud, where initial frequency is
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* 29491200Hz, and XTAL frequency is 38.4MHz.
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*/
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mid_writel(plat, UART_MUL, 96);
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mid_writel(plat, UART_DIV, 125);
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mid_writel(plat, UART_PS, 16);
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return ns16550_serial_probe(dev);
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}
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static const struct udevice_id mid_serial_ids[] = {
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{ .compatible = "intel,mid-uart" },
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{}
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};
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U_BOOT_DRIVER(serial_intel_mid) = {
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.name = "serial_intel_mid",
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.id = UCLASS_SERIAL,
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.of_match = mid_serial_ids,
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.of_to_plat = ns16550_serial_of_to_plat,
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.plat_auto = sizeof(struct ns16550_plat),
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.priv_auto = sizeof(struct ns16550),
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.probe = mid_serial_probe,
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.ops = &ns16550_serial_ops,
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};
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