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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
92 lines
2.2 KiB
C
92 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*/
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#include <common.h>
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#include <cpu_func.h>
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#include <hang.h>
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#include <spi_flash.h>
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#include <malloc.h>
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#define ESPI_BOOT_IMAGE_SIZE 0x48
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#define ESPI_BOOT_IMAGE_ADDR 0x50
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#define CFG_CFG_DATA_SECTOR 0
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void fsl_spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst)
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{
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struct spi_flash *flash;
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flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
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CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
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if (flash == NULL) {
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puts("\nspi_flash_probe failed");
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hang();
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}
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spi_flash_read(flash, offs, size, vdst);
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}
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/*
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* The main entry for SPI booting. It's necessary that SDRAM is already
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* configured and available since this code loads the main U-Boot image
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* from SPI into SDRAM and starts it from there.
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*/
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void fsl_spi_boot(void)
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{
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void (*uboot)(void) __noreturn;
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u32 offset, code_len, copy_len = 0;
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#ifndef CONFIG_FSL_CORENET
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unsigned char *buf = NULL;
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#endif
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struct spi_flash *flash;
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flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
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CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
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if (flash == NULL) {
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puts("\nspi_flash_probe failed");
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hang();
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}
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#ifdef CONFIG_FSL_CORENET
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offset = CFG_SYS_SPI_FLASH_U_BOOT_OFFS;
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code_len = CFG_SYS_SPI_FLASH_U_BOOT_SIZE;
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#else
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/*
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* Load U-Boot image from SPI flash into RAM
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*/
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buf = malloc(flash->page_size);
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if (buf == NULL) {
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puts("\nmalloc failed");
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hang();
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}
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memset(buf, 0, flash->page_size);
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spi_flash_read(flash, CFG_CFG_DATA_SECTOR,
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flash->page_size, (void *)buf);
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offset = *(u32 *)(buf + ESPI_BOOT_IMAGE_ADDR);
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/* Skip spl code */
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offset += CFG_SYS_SPI_FLASH_U_BOOT_OFFS;
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/* Get the code size from offset 0x48 */
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code_len = *(u32 *)(buf + ESPI_BOOT_IMAGE_SIZE);
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/* Skip spl code */
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code_len = code_len - CONFIG_SPL_MAX_SIZE;
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#endif
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/* copy code to DDR */
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printf("Loading second stage boot loader ");
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while (copy_len <= code_len) {
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spi_flash_read(flash, offset + copy_len, 0x2000,
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(void *)(CFG_SYS_SPI_FLASH_U_BOOT_DST
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+ copy_len));
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copy_len = copy_len + 0x2000;
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putc('.');
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}
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/*
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* Jump to U-Boot image
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*/
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flush_cache(CFG_SYS_SPI_FLASH_U_BOOT_DST, code_len);
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uboot = (void *)CFG_SYS_SPI_FLASH_U_BOOT_START;
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(*uboot)();
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}
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