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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
85 lines
2.7 KiB
C
85 lines
2.7 KiB
C
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2021 Samuel Holland <samuel@sholland.org>
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*/
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#include <common.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <errno.h>
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#include <clk/sunxi.h>
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#include <dt-bindings/clock/sun20i-d1-ccu.h>
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#include <dt-bindings/reset/sun20i-d1-ccu.h>
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#include <linux/bitops.h>
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static struct ccu_clk_gate d1_gates[] = {
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[CLK_APB0] = GATE_DUMMY,
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[CLK_BUS_MMC0] = GATE(0x84c, BIT(0)),
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[CLK_BUS_MMC1] = GATE(0x84c, BIT(1)),
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[CLK_BUS_MMC2] = GATE(0x84c, BIT(2)),
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[CLK_BUS_UART0] = GATE(0x90c, BIT(0)),
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[CLK_BUS_UART1] = GATE(0x90c, BIT(1)),
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[CLK_BUS_UART2] = GATE(0x90c, BIT(2)),
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[CLK_BUS_UART3] = GATE(0x90c, BIT(3)),
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[CLK_BUS_UART4] = GATE(0x90c, BIT(4)),
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[CLK_BUS_UART5] = GATE(0x90c, BIT(5)),
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[CLK_BUS_I2C0] = GATE(0x91c, BIT(0)),
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[CLK_BUS_I2C1] = GATE(0x91c, BIT(1)),
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[CLK_BUS_I2C2] = GATE(0x91c, BIT(2)),
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[CLK_BUS_I2C3] = GATE(0x91c, BIT(3)),
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[CLK_SPI0] = GATE(0x940, BIT(31)),
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[CLK_SPI1] = GATE(0x944, BIT(31)),
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[CLK_BUS_SPI0] = GATE(0x96c, BIT(0)),
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[CLK_BUS_SPI1] = GATE(0x96c, BIT(1)),
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[CLK_BUS_EMAC] = GATE(0x97c, BIT(0)),
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[CLK_USB_OHCI0] = GATE(0xa70, BIT(31)),
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[CLK_USB_OHCI1] = GATE(0xa74, BIT(31)),
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[CLK_BUS_OHCI0] = GATE(0xa8c, BIT(0)),
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[CLK_BUS_OHCI1] = GATE(0xa8c, BIT(1)),
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[CLK_BUS_EHCI0] = GATE(0xa8c, BIT(4)),
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[CLK_BUS_EHCI1] = GATE(0xa8c, BIT(5)),
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[CLK_BUS_OTG] = GATE(0xa8c, BIT(8)),
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[CLK_BUS_LRADC] = GATE(0xa9c, BIT(0)),
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[CLK_RISCV] = GATE(0xd04, BIT(31)),
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};
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static struct ccu_reset d1_resets[] = {
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[RST_BUS_MMC0] = RESET(0x84c, BIT(16)),
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[RST_BUS_MMC1] = RESET(0x84c, BIT(17)),
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[RST_BUS_MMC2] = RESET(0x84c, BIT(18)),
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[RST_BUS_UART0] = RESET(0x90c, BIT(16)),
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[RST_BUS_UART1] = RESET(0x90c, BIT(17)),
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[RST_BUS_UART2] = RESET(0x90c, BIT(18)),
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[RST_BUS_UART3] = RESET(0x90c, BIT(19)),
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[RST_BUS_UART4] = RESET(0x90c, BIT(20)),
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[RST_BUS_UART5] = RESET(0x90c, BIT(21)),
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[RST_BUS_I2C0] = RESET(0x91c, BIT(16)),
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[RST_BUS_I2C1] = RESET(0x91c, BIT(17)),
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[RST_BUS_I2C2] = RESET(0x91c, BIT(18)),
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[RST_BUS_I2C3] = RESET(0x91c, BIT(19)),
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[RST_BUS_SPI0] = RESET(0x96c, BIT(16)),
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[RST_BUS_SPI1] = RESET(0x96c, BIT(17)),
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[RST_BUS_EMAC] = RESET(0x97c, BIT(16)),
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[RST_USB_PHY0] = RESET(0xa70, BIT(30)),
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[RST_USB_PHY1] = RESET(0xa74, BIT(30)),
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[RST_BUS_OHCI0] = RESET(0xa8c, BIT(16)),
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[RST_BUS_OHCI1] = RESET(0xa8c, BIT(17)),
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[RST_BUS_EHCI0] = RESET(0xa8c, BIT(20)),
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[RST_BUS_EHCI1] = RESET(0xa8c, BIT(21)),
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[RST_BUS_OTG] = RESET(0xa8c, BIT(24)),
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[RST_BUS_LRADC] = RESET(0xa9c, BIT(16)),
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};
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const struct ccu_desc d1_ccu_desc = {
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.gates = d1_gates,
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.resets = d1_resets,
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.num_gates = ARRAY_SIZE(d1_gates),
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.num_resets = ARRAY_SIZE(d1_resets),
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};
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