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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
143 lines
2.9 KiB
C
143 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2021 NXP
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*
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* Peng Fan <peng.fan@nxp.com>
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*/
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#include <common.h>
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#include <log.h>
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#include <asm/io.h>
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#include <malloc.h>
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#include <clk-uclass.h>
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#include <dm/device.h>
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#include <dm/devres.h>
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#include <linux/iopoll.h>
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#include <linux/clk-provider.h>
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#include <clk.h>
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#include "clk.h"
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#include <linux/err.h>
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#define TIMEOUT_US 500U
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#define CCM_DIV_SHIFT 0
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#define CCM_DIV_WIDTH 8
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#define CCM_MUX_SHIFT 8
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#define CCM_MUX_MASK 3
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#define CCM_OFF_SHIFT 24
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#define CCM_BUSY_SHIFT 28
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#define STAT_OFFSET 0x4
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#define AUTHEN_OFFSET 0x30
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#define TZ_NS_SHIFT 9
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#define TZ_NS_MASK BIT(9)
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#define WHITE_LIST_SHIFT 16
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#define readl_poll_timeout_atomic readl_poll_timeout
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static int imx93_clk_composite_wait_ready(struct clk *clk, void __iomem *reg)
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{
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int ret;
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u32 val;
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ret = readl_poll_timeout_atomic(reg + STAT_OFFSET, val, !(val & BIT(CCM_BUSY_SHIFT)),
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TIMEOUT_US);
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if (ret)
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pr_err("Slice[%s] busy timeout\n", "TODO");
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return ret;
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}
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static void imx93_clk_composite_gate_endisable(struct clk *clk, int enable)
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{
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struct clk_gate *gate = to_clk_gate(clk);
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u32 reg;
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reg = readl(gate->reg);
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if (enable)
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reg &= ~BIT(gate->bit_idx);
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else
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reg |= BIT(gate->bit_idx);
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writel(reg, gate->reg);
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imx93_clk_composite_wait_ready(clk, gate->reg);
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}
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static int imx93_clk_composite_gate_enable(struct clk *clk)
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{
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imx93_clk_composite_gate_endisable(clk, 1);
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return 0;
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}
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static int imx93_clk_composite_gate_disable(struct clk *clk)
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{
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imx93_clk_composite_gate_endisable(clk, 0);
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return 0;
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}
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static const struct clk_ops imx93_clk_composite_gate_ops = {
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.enable = imx93_clk_composite_gate_enable,
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.disable = imx93_clk_composite_gate_disable,
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};
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struct clk *imx93_clk_composite_flags(const char *name,
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const char * const *parent_names,
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int num_parents, void __iomem *reg, u32 domain_id,
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unsigned long flags)
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{
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struct clk *clk = ERR_PTR(-ENOMEM);
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struct clk_divider *div = NULL;
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struct clk_gate *gate = NULL;
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struct clk_mux *mux = NULL;
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mux = kzalloc(sizeof(*mux), GFP_KERNEL);
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if (!mux)
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goto fail;
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mux->reg = reg;
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mux->shift = CCM_MUX_SHIFT;
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mux->mask = CCM_MUX_MASK;
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mux->num_parents = num_parents;
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mux->parent_names = parent_names;
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mux->flags = flags;
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div = kzalloc(sizeof(*div), GFP_KERNEL);
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if (!div)
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goto fail;
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div->reg = reg;
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div->shift = CCM_DIV_SHIFT;
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div->width = CCM_DIV_WIDTH;
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div->flags = CLK_DIVIDER_ROUND_CLOSEST | flags;
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gate = kzalloc(sizeof(*gate), GFP_KERNEL);
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if (!gate)
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goto fail;
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gate->reg = reg;
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gate->bit_idx = CCM_OFF_SHIFT;
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gate->flags = flags;
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clk = clk_register_composite(NULL, name,
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parent_names, num_parents,
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&mux->clk, &clk_mux_ops,
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&div->clk, &clk_divider_ops,
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&gate->clk, &imx93_clk_composite_gate_ops,
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flags);
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if (IS_ERR(clk))
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goto fail;
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return clk;
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fail:
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kfree(gate);
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kfree(div);
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kfree(mux);
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return ERR_CAST(clk);
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}
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