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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
78 lines
1.8 KiB
C
78 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
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*/
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#define LOG_CATEGORY LOGC_ARCH
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#include <common.h>
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#include <dm.h>
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#include <image.h>
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#include <init.h>
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#include <lmb.h>
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#include <log.h>
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#include <ram.h>
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#include <asm/global_data.h>
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#include <asm/system.h>
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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struct ram_info ram;
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struct udevice *dev;
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int ret;
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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/* in case there is no RAM driver, retrieve DDR size from DT */
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if (ret == -ENODEV) {
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return fdtdec_setup_mem_size_base();
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} else if (ret) {
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log_err("RAM init failed: %d\n", ret);
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return ret;
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}
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ret = ram_get_info(dev, &ram);
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if (ret) {
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log_debug("Cannot get RAM size: %d\n", ret);
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return ret;
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}
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log_debug("RAM init base=%p, size=%zx\n", (void *)ram.base, ram.size);
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gd->ram_size = ram.size;
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return 0;
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}
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phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
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{
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phys_size_t size;
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phys_addr_t reg;
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struct lmb lmb;
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if (!total_size)
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return gd->ram_top;
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/*
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* make sure U-Boot uses address space below 4GB boundaries even
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* if the effective available memory is bigger
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*/
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gd->ram_top = clamp_val(gd->ram_top, 0, SZ_4G - 1);
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/* found enough not-reserved memory to relocated U-Boot */
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lmb_init(&lmb);
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lmb_add(&lmb, gd->ram_base, gd->ram_top - gd->ram_base);
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boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob);
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/* add 8M for reserved memory for display, fdt, gd,... */
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size = ALIGN(SZ_8M + CONFIG_SYS_MALLOC_LEN + total_size, MMU_SECTION_SIZE),
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reg = lmb_alloc(&lmb, size, MMU_SECTION_SIZE);
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if (!reg)
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reg = gd->ram_top - size;
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/* before relocation, mark the U-Boot memory as cacheable by default */
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if (!(gd->flags & GD_FLG_RELOC))
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mmu_set_region_dcache_behaviour(reg, size, DCACHE_DEFAULT_OPTION);
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return reg + size;
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}
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