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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
63 lines
1.5 KiB
C
63 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2016-2018 Intel Corporation <www.intel.com>
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*
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*/
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#include <common.h>
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#include <asm/arch/clock_manager.h>
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#include <asm/io.h>
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#include <asm/arch/handoff_soc64.h>
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#include <asm/arch/system_manager.h>
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const struct cm_config * const cm_get_default_config(void)
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{
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#ifdef CONFIG_SPL_BUILD
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struct cm_config *cm_handoff_cfg = (struct cm_config *)
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(SOC64_HANDOFF_CLOCK + SOC64_HANDOFF_OFFSET_DATA);
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u32 *conversion = (u32 *)cm_handoff_cfg;
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u32 i;
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u32 handoff_clk = readl(SOC64_HANDOFF_CLOCK);
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if (swab32(handoff_clk) == SOC64_HANDOFF_MAGIC_CLOCK) {
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writel(swab32(handoff_clk), SOC64_HANDOFF_CLOCK);
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for (i = 0; i < (sizeof(*cm_handoff_cfg) / sizeof(u32)); i++)
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conversion[i] = swab32(conversion[i]);
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return cm_handoff_cfg;
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} else if (handoff_clk == SOC64_HANDOFF_MAGIC_CLOCK) {
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return cm_handoff_cfg;
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}
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#endif
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return NULL;
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}
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const unsigned int cm_get_osc_clk_hz(void)
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{
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#ifdef CONFIG_SPL_BUILD
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u32 clock = readl(SOC64_HANDOFF_CLOCK_OSC);
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writel(clock,
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socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD1);
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#endif
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return readl(socfpga_get_sysmgr_addr() +
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SYSMGR_SOC64_BOOT_SCRATCH_COLD1);
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}
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const unsigned int cm_get_intosc_clk_hz(void)
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{
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return CLKMGR_INTOSC_HZ;
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}
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const unsigned int cm_get_fpga_clk_hz(void)
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{
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#ifdef CONFIG_SPL_BUILD
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u32 clock = readl(SOC64_HANDOFF_CLOCK_FPGA);
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writel(clock,
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socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD2);
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#endif
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return readl(socfpga_get_sysmgr_addr() +
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SYSMGR_SOC64_BOOT_SCRATCH_COLD2);
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}
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