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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
80 lines
1.6 KiB
C
80 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2013 Stefan Roese <sr@denx.de>
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*/
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#include <common.h>
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#include <lmb.h>
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#include <log.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/global_data.h>
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <asm/io.h>
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#include <asm/mach-imx/regs-common.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* 1 second delay should be plenty of time for block reset. */
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#define RESET_MAX_TIMEOUT 1000000
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#define MXS_BLOCK_SFTRST (1 << 31)
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#define MXS_BLOCK_CLKGATE (1 << 30)
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int mxs_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned
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int timeout)
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{
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while (--timeout) {
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if ((readl(®->reg) & mask) == mask)
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break;
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udelay(1);
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}
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return !timeout;
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}
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int mxs_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned
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int timeout)
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{
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while (--timeout) {
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if ((readl(®->reg) & mask) == 0)
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break;
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udelay(1);
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}
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return !timeout;
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}
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int mxs_reset_block(struct mxs_register_32 *reg)
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{
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/* Clear SFTRST */
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writel(MXS_BLOCK_SFTRST, ®->reg_clr);
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if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
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return 1;
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/* Clear CLKGATE */
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writel(MXS_BLOCK_CLKGATE, ®->reg_clr);
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/* Set SFTRST */
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writel(MXS_BLOCK_SFTRST, ®->reg_set);
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/* Wait for CLKGATE being set */
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if (mxs_wait_mask_set(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
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return 1;
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/* Clear SFTRST */
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writel(MXS_BLOCK_SFTRST, ®->reg_clr);
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if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
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return 1;
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/* Clear CLKGATE */
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writel(MXS_BLOCK_CLKGATE, ®->reg_clr);
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if (mxs_wait_mask_clr(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
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return 1;
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return 0;
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}
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