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d678a59d2d
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commitc8ffd1356d, reversing changes made to2ee6f3a5f7. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
102 lines
2.8 KiB
C
102 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2013 Atmel Corporation
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* Josh Wu <josh.wu@atmel.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_pio.h>
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#include <asm/arch/clk.h>
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unsigned int has_lcdc()
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{
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return 1;
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}
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void at91_serial0_hw_init(void)
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{
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 0, 1); /* TXD0 */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 1, 0); /* RXD0 */
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at91_periph_clk_enable(ATMEL_ID_USART0);
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}
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void at91_serial1_hw_init(void)
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{
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 5, 1); /* TXD1 */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 6, 0); /* RXD1 */
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at91_periph_clk_enable(ATMEL_ID_USART1);
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}
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void at91_serial2_hw_init(void)
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{
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 7, 1); /* TXD2 */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 8, 0); /* RXD2 */
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at91_periph_clk_enable(ATMEL_ID_USART2);
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}
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void at91_serial3_hw_init(void)
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{
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at91_pio3_set_b_periph(AT91_PIO_PORTC, 22, 1); /* TXD3 */
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at91_pio3_set_b_periph(AT91_PIO_PORTC, 23, 0); /* RXD3 */
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at91_periph_clk_enable(ATMEL_ID_USART3);
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}
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void at91_seriald_hw_init(void)
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{
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */
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at91_periph_clk_enable(ATMEL_ID_SYS);
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}
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#ifdef CONFIG_ATMEL_SPI
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void at91_spi0_hw_init(unsigned long cs_mask)
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{
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 11, 0); /* SPI0_MISO */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 12, 0); /* SPI0_MOSI */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 13, 0); /* SPI0_SPCK */
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at91_periph_clk_enable(ATMEL_ID_SPI0);
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if (cs_mask & (1 << 0))
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at91_set_pio_output(AT91_PIO_PORTA, 14, 1);
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if (cs_mask & (1 << 1))
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at91_set_pio_output(AT91_PIO_PORTA, 7, 1);
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if (cs_mask & (1 << 2))
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at91_set_pio_output(AT91_PIO_PORTA, 1, 1);
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if (cs_mask & (1 << 3))
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at91_set_pio_output(AT91_PIO_PORTB, 3, 1);
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}
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void at91_spi1_hw_init(unsigned long cs_mask)
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{
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at91_pio3_set_b_periph(AT91_PIO_PORTA, 21, 0); /* SPI1_MISO */
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at91_pio3_set_b_periph(AT91_PIO_PORTA, 22, 0); /* SPI1_MOSI */
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at91_pio3_set_b_periph(AT91_PIO_PORTA, 23, 0); /* SPI1_SPCK */
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at91_periph_clk_enable(ATMEL_ID_SPI1);
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if (cs_mask & (1 << 0))
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at91_set_pio_output(AT91_PIO_PORTA, 8, 1);
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if (cs_mask & (1 << 1))
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at91_set_pio_output(AT91_PIO_PORTA, 0, 1);
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if (cs_mask & (1 << 2))
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at91_set_pio_output(AT91_PIO_PORTA, 31, 1);
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if (cs_mask & (1 << 3))
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at91_set_pio_output(AT91_PIO_PORTA, 30, 1);
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}
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#endif
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void at91_mci_hw_init(void)
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{
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 17, 0); /* MCCK */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 16, 0); /* MCCDA */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 15, 0); /* MCDA0 */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 18, 0); /* MCDA1 */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 19, 0); /* MCDA2 */
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at91_pio3_set_a_periph(AT91_PIO_PORTA, 20, 0); /* MCDA3 */
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at91_periph_clk_enable(ATMEL_ID_HSMCI0);
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}
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