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3c2e6002f5
i.MX8MQ/M use MMIO based method to directly configure SRC registers to start/stop M4. Add mmio ops to start/stop/is_running. Add i.MX8MQ cfg data, i.MX8MN reuses i.MX8MQ data. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
341 lines
8.4 KiB
C
341 lines
8.4 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2025 NXP
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*/
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#include <asm/io.h>
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#include <dm.h>
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#include <errno.h>
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#include <dm/device_compat.h>
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#include <linux/arm-smccc.h>
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#include <linux/types.h>
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#include <regmap.h>
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#include <remoteproc.h>
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#include <syscon.h>
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#include "imx_rproc.h"
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#define IMX7D_SRC_SCR 0x0C
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#define IMX7D_ENABLE_M4 BIT(3)
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#define IMX7D_SW_M4P_RST BIT(2)
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#define IMX7D_SW_M4C_RST BIT(1)
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#define IMX7D_SW_M4C_NON_SCLR_RST BIT(0)
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#define IMX7D_M4_RST_MASK (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \
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| IMX7D_SW_M4C_RST \
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| IMX7D_SW_M4C_NON_SCLR_RST)
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#define IMX7D_M4_START (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \
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| IMX7D_SW_M4C_RST)
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#define IMX7D_M4_STOP (IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST | \
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IMX7D_SW_M4C_NON_SCLR_RST)
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#define IMX_RPROC_MEM_MAX 32
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#define IMX_SIP_RPROC 0xC2000005
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#define IMX_SIP_RPROC_START 0x00
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#define IMX_SIP_RPROC_STARTED 0x01
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#define IMX_SIP_RPROC_STOP 0x02
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struct imx_rproc {
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const struct imx_rproc_dcfg *dcfg;
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struct regmap *regmap;
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};
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/* att flags: lower 16 bits specifying core, higher 16 bits for flags */
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/* M4 own area. Can be mapped at probe */
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#define ATT_OWN BIT(31)
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#define ATT_IOMEM BIT(30)
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static int imx_rproc_arm_smc_start(struct udevice *dev)
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{
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struct arm_smccc_res res;
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arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, 0, 0, 0, 0, 0, 0, &res);
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return res.a0;
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}
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static int imx_rproc_mmio_start(struct udevice *dev)
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{
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struct imx_rproc *priv = dev_get_priv(dev);
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const struct imx_rproc_dcfg *dcfg = priv->dcfg;
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return regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask, dcfg->src_start);
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}
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static int imx_rproc_start(struct udevice *dev)
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{
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struct imx_rproc *priv = dev_get_priv(dev);
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const struct imx_rproc_dcfg *dcfg = priv->dcfg;
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int ret;
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if (!dcfg->ops || !dcfg->ops->start)
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return -EOPNOTSUPP;
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ret = dcfg->ops->start(dev);
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if (ret)
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dev_err(dev, "Failed to enable remote core!\n");
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return ret;
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}
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static int imx_rproc_arm_smc_stop(struct udevice *dev)
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{
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struct arm_smccc_res res;
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arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STOP, 0, 0, 0, 0, 0, 0, &res);
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if (res.a1)
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dev_info(dev, "Not in wfi, force stopped\n");
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return res.a0;
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}
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static int imx_rproc_mmio_stop(struct udevice *dev)
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{
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struct imx_rproc *priv = dev_get_priv(dev);
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const struct imx_rproc_dcfg *dcfg = priv->dcfg;
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return regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask, dcfg->src_stop);
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}
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static int imx_rproc_stop(struct udevice *dev)
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{
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struct imx_rproc *priv = dev_get_priv(dev);
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const struct imx_rproc_dcfg *dcfg = priv->dcfg;
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int ret;
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if (!dcfg->ops || !dcfg->ops->stop)
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return -EOPNOTSUPP;
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ret = dcfg->ops->stop(dev);
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if (ret)
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dev_err(dev, "Failed to stop remote core\n");
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return ret;
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}
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static int imx_rproc_arm_smc_is_running(struct udevice *dev)
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{
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struct arm_smccc_res res;
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arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STARTED, 0, 0, 0, 0, 0, 0, &res);
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if (res.a0)
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return 0;
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return 1;
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}
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static int imx_rproc_mmio_is_running(struct udevice *dev)
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{
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struct imx_rproc *priv = dev_get_priv(dev);
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const struct imx_rproc_dcfg *dcfg = priv->dcfg;
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int ret;
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u32 val;
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ret = regmap_read(priv->regmap, dcfg->src_reg, &val);
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if (ret) {
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dev_err(dev, "Failed to read src\n");
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return ret;
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}
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if ((val & dcfg->src_mask) != dcfg->src_stop)
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return 0;
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return 1;
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}
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static int imx_rproc_is_running(struct udevice *dev)
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{
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struct imx_rproc *priv = dev_get_priv(dev);
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const struct imx_rproc_dcfg *dcfg = priv->dcfg;
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if (!dcfg->ops || !dcfg->ops->is_running)
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return 0;
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return dcfg->ops->is_running(dev);
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}
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static int imx_rproc_init(struct udevice *dev)
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{
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return 0;
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}
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static int imx_rproc_da_to_sys(struct udevice *dev, u64 da, size_t len, u64 *sys, bool *is_iomem)
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{
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struct imx_rproc *priv = dev_get_priv(dev);
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const struct imx_rproc_dcfg *dcfg = priv->dcfg;
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int i;
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/* parse address translation table */
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for (i = 0; i < dcfg->att_size; i++) {
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const struct imx_rproc_att *att = &dcfg->att[i];
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if (da >= att->da && da + len < att->da + att->size) {
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unsigned int offset = da - att->da;
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*sys = att->sa + offset;
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if (is_iomem)
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*is_iomem = att->flags & ATT_IOMEM;
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return 0;
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}
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}
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dev_err(dev, "Translation failed: da = 0x%llx len = 0x%zx\n", da, len);
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return -ENOENT;
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}
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static void *imx_rproc_device_to_virt(struct udevice *dev, ulong da, ulong size, bool *is_iomem)
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{
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u64 sys;
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if (imx_rproc_da_to_sys(dev, da, size, &sys, is_iomem))
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return NULL;
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dev_dbg(dev, "da = 0x%lx len = 0x%lx sys = 0x%llx\n", da, size, sys);
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return phys_to_virt(sys);
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}
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static int imx_rproc_load(struct udevice *dev, ulong addr, ulong size)
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{
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return rproc_elf_load_image(dev, addr, size);
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}
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static const struct dm_rproc_ops imx_rproc_ops = {
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.init = imx_rproc_init,
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.start = imx_rproc_start,
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.stop = imx_rproc_stop,
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.load = imx_rproc_load,
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.device_to_virt = imx_rproc_device_to_virt,
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.is_running = imx_rproc_is_running,
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};
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static int imx_rproc_probe(struct udevice *dev)
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{
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struct imx_rproc *priv = dev_get_priv(dev);
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struct imx_rproc_dcfg *dcfg = (struct imx_rproc_dcfg *)dev_get_driver_data(dev);
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ofnode node;
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node = dev_ofnode(dev);
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priv->dcfg = dcfg;
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if (dcfg->method != IMX_RPROC_MMIO)
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return 0;
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priv->regmap = syscon_regmap_lookup_by_phandle(dev, "syscon");
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if (IS_ERR(priv->regmap)) {
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dev_err(dev, "No syscon: %ld\n", PTR_ERR(priv->regmap));
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return PTR_ERR(priv->regmap);
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}
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return 0;
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}
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static const struct imx_rproc_att imx_rproc_att_imx8mn[] = {
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/* dev addr , sys addr , size , flags */
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/* ITCM */
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{ 0x00000000, 0x007E0000, 0x00020000, ATT_OWN | ATT_IOMEM },
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/* OCRAM_S */
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{ 0x00180000, 0x00180000, 0x00009000, 0 },
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/* OCRAM */
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{ 0x00900000, 0x00900000, 0x00020000, 0 },
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/* OCRAM */
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{ 0x00920000, 0x00920000, 0x00020000, 0 },
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/* OCRAM */
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{ 0x00940000, 0x00940000, 0x00050000, 0 },
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/* QSPI Code - alias */
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{ 0x08000000, 0x08000000, 0x08000000, 0 },
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/* DDR (Code) - alias */
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{ 0x10000000, 0x40000000, 0x0FFE0000, 0 },
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/* DTCM */
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{ 0x20000000, 0x00800000, 0x00020000, ATT_OWN | ATT_IOMEM },
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/* OCRAM_S - alias */
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{ 0x20180000, 0x00180000, 0x00008000, ATT_OWN },
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/* OCRAM */
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{ 0x20200000, 0x00900000, 0x00020000, ATT_OWN },
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/* OCRAM */
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{ 0x20220000, 0x00920000, 0x00020000, ATT_OWN },
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/* OCRAM */
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{ 0x20240000, 0x00940000, 0x00040000, ATT_OWN },
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/* DDR (Data) */
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{ 0x40000000, 0x40000000, 0x80000000, 0 },
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};
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static const struct imx_rproc_plat_ops imx_rproc_ops_arm_smc = {
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.start = imx_rproc_arm_smc_start,
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.stop = imx_rproc_arm_smc_stop,
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.is_running = imx_rproc_arm_smc_is_running,
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};
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static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = {
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.att = imx_rproc_att_imx8mn,
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.att_size = ARRAY_SIZE(imx_rproc_att_imx8mn),
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.method = IMX_RPROC_SMC,
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.ops = &imx_rproc_ops_arm_smc,
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};
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static const struct imx_rproc_att imx_rproc_att_imx8mq[] = {
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/* dev addr , sys addr , size , flags */
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/* TCML - alias */
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{ 0x00000000, 0x007e0000, 0x00020000, ATT_IOMEM},
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/* OCRAM_S */
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{ 0x00180000, 0x00180000, 0x00008000, 0 },
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/* OCRAM */
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{ 0x00900000, 0x00900000, 0x00020000, 0 },
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/* OCRAM */
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{ 0x00920000, 0x00920000, 0x00020000, 0 },
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/* QSPI Code - alias */
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{ 0x08000000, 0x08000000, 0x08000000, 0 },
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/* DDR (Code) - alias */
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{ 0x10000000, 0x40000000, 0x0FFE0000, 0 },
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/* TCML/U */
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{ 0x1FFE0000, 0x007E0000, 0x00040000, ATT_OWN | ATT_IOMEM},
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/* OCRAM_S */
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{ 0x20180000, 0x00180000, 0x00008000, ATT_OWN },
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/* OCRAM */
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{ 0x20200000, 0x00900000, 0x00020000, ATT_OWN },
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/* OCRAM */
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{ 0x20220000, 0x00920000, 0x00020000, ATT_OWN },
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/* DDR (Data) */
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{ 0x40000000, 0x40000000, 0x80000000, 0 },
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};
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static const struct imx_rproc_plat_ops imx_rproc_ops_mmio = {
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.start = imx_rproc_mmio_start,
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.stop = imx_rproc_mmio_stop,
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.is_running = imx_rproc_mmio_is_running,
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};
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static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
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.src_reg = IMX7D_SRC_SCR,
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.src_mask = IMX7D_M4_RST_MASK,
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.src_start = IMX7D_M4_START,
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.src_stop = IMX7D_M4_STOP,
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.att = imx_rproc_att_imx8mq,
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.att_size = ARRAY_SIZE(imx_rproc_att_imx8mq),
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.method = IMX_RPROC_MMIO,
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.ops = &imx_rproc_ops_mmio,
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};
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static const struct udevice_id imx_rproc_ids[] = {
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{ .compatible = "fsl,imx8mm-cm4", .data = (ulong)&imx_rproc_cfg_imx8mq },
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{ .compatible = "fsl,imx8mn-cm7", .data = (ulong)&imx_rproc_cfg_imx8mn, },
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{ .compatible = "fsl,imx8mp-cm7", .data = (ulong)&imx_rproc_cfg_imx8mn, },
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{ .compatible = "fsl,imx8mq-cm4", .data = (ulong)&imx_rproc_cfg_imx8mq },
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{}
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};
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U_BOOT_DRIVER(imx_rproc) = {
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.name = "imx_rproc",
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.of_match = imx_rproc_ids,
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.id = UCLASS_REMOTEPROC,
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.ops = &imx_rproc_ops,
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.probe = imx_rproc_probe,
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.priv_auto = sizeof(struct imx_rproc),
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};
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