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			51 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			51 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2009 Freescale Semiconductor, Inc.
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <common.h>
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| #include <asm/io.h>
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| 
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| #include "bcsr.h"
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| 
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| void enable_8569mds_flash_write(void)
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| {
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| 	setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP);
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| }
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| 
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| void disable_8569mds_flash_write(void)
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| {
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| 	clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP);
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| }
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| 
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| void enable_8569mds_qe_uec(void)
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| {
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| #if defined(CONFIG_SYS_UCC_RGMII_MODE)
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| 	setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7),
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| 			BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN);
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| 	setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8),
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| 			BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN);
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| 	setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9),
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| 			BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN);
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| 	setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10),
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| 			BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN);
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| #elif defined(CONFIG_SYS_UCC_RMII_MODE)
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| 	/* Set UCC1-4 working at RMII mode */
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| 	clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7),
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| 			BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN);
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| 	clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8),
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| 			BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN);
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| 	clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9),
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| 			BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN);
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| 	clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10),
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| 			BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN);
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| 	setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), BCSR9_UCC3_RMII_EN);
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| #endif
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| }
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| 
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| void disable_8569mds_brd_eeprom_write_protect(void)
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| {
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| 	clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), BCSR7_BRD_WRT_PROTECT);
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| }
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