Andre Przywara
ad9dcb5001
pinctrl: sunxi: add Allwinner D1 pinctrl description
...
Apart from using the new pinctrl MMIO register layout, the Allwinner D1
and related SoCs still need to usual set of mux values hardcoded in
U-Boot's pinctrl driver.
Add the values we need so far to this list, so that DM based drivers
will just work without further ado.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-10-22 23:41:51 +01:00
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