Marek Vasut 37b7b13d48 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 3 ...

Clean up odd multiline loop, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>

2015-08-08 14:14:20 +02:00

..

Makefile

driver/ddr/altera: Add the sdram calibration portion

2015-08-08 14:14:05 +02:00

sdram.c

ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESS

2015-08-08 14:14:11 +02:00

sequencer_auto_ac_init.h

driver/ddr/altera: Add the sdram calibration portion

2015-08-08 14:14:05 +02:00

sequencer_auto_inst_init.h

driver/ddr/altera: Add the sdram calibration portion

2015-08-08 14:14:05 +02:00

sequencer_auto.h

driver/ddr/altera: Add the sdram calibration portion

2015-08-08 14:14:05 +02:00

sequencer_defines.h

driver/ddr/altera: Add the sdram calibration portion

2015-08-08 14:14:05 +02:00

sequencer.c

ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 3

2015-08-08 14:14:20 +02:00

sequencer.h

ddr: altera: Clean up mem_config()

2015-08-08 14:14:14 +02:00