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	This adds a SPI flash driver which simulates SPI flash clients. Currently supports the bare min that U-Boot requires: you can probe, read, erase, and write. Should be easy to extend to make it behave more exactly like a real SPI flash, but this is good enough to merge now. sjg@chromium.org added a README and tidied up code a little. Added a required map_sysmem() for sandbox. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Simon Glass <sjg@chromium.org>
		
			
				
	
	
		
			65 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			65 lines
		
	
	
		
			1.9 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| Sandbox SPI/SPI Flash Implementation
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| ====================================
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| 
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| U-Boot supports SPI and SPI flash emuation in sandbox. This must be enabled
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| using the --spi_sf paramter when starting U-Boot.
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| 
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| For example:
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| 
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| $ make O=sandbox sandbox_config
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| $ make O=sandbox
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| $ ./sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin
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| 
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| The four parameters to spi_sf are:
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| 
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|    SPI bus number (typically 0)
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|    SPI chip select number (typically 0)
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|    SPI chip to emulate
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|    File containing emulated data
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| 
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| Supported chips are W25Q16 (2MB), W25Q32 (4MB) and W25Q128 (16MB). Once
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| U-Boot it started you can use 'sf' commands as normal. For example:
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| 
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| $ ./b/sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin \
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| 	-c "sf probe; sf test 0 100000; sf read 0 1000 1000; \
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| 		sf erase 1000 1000; sf write 0 1000 1000"
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| 
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| 
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| U-Boot 2013.10-00237-gd4e0fdb (Nov 07 2013 - 20:08:15)
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| 
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| DRAM:  128 MiB
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| Using default environment
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| 
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| In:    serial
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| Out:   serial
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| Err:   serial
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| SF: Detected W25Q128BV with page size 256 Bytes, erase size 4 KiB, total 16 MiB
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| SPI flash test:
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| 0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps
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| 1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps
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| 2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps
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| 3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps
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| Test passed
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| 0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps
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| 1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps
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| 2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps
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| 3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps
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| SF: 4096 bytes @ 0x1000 Read: OK
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| SF: 4096 bytes @ 0x1000 Erased: OK
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| SF: 4096 bytes @ 0x1000 Written: OK
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| 
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| 
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| Since the SPI bus is fully implemented as well as the SPI flash connected to
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| it, you can also use low-level SPI commands to access the flash. For example
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| this reads the device ID from the emulated chip:
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| 
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| => sspi 0 32 9f
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| FFEF4018
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| 
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| 
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| Simon Glass
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| sjg@chromium.org
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| 7/11/2013
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| Note that the sandbox SPI implementation was written by Mike Frysinger
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| <vapier@gentoo.org>.
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