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	Update the rm9200 reset sequence to try executing a board-specific reset function and move specific board reset to board. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
		
			
				
	
	
		
			153 lines
		
	
	
		
			4.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			153 lines
		
	
	
		
			4.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * (C) Copyright 2002
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|  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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|  * Marius Groeger <mgroeger@sysgo.de>
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| #include <common.h>
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| #include <asm/arch/AT91RM9200.h>
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| #include <at91rm9200_net.h>
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| #include <dm9161.h>
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| /* ------------------------------------------------------------------------- */
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| /*
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|  * Miscelaneous platform dependent initialisations
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|  */
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| 
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| int board_init (void)
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| {
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| 	/* Enable Ctrlc */
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| 	console_init_f ();
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| 
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| 	/* Correct IRDA resistor problem */
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| 	/* Set PA23_TXD in Output */
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| 	((AT91PS_PIO) AT91C_BASE_PIOA)->PIO_OER = AT91C_PA23_TXD2;
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| 
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| 	/* memory and cpu-speed are setup before relocation */
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| 	/* so we do _nothing_ here */
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| 
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| 	/* arch number of AT91RM9200DK-Board */
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| 	gd->bd->bi_arch_number = MACH_TYPE_AT91RM9200DK;
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| 	/* adress of boot parameters */
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| 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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| 
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| 	return 0;
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| }
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| 
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| void board_reset (void)
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| {
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| 	AT91PS_PIO pio = AT91C_BASE_PIOA;
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| 
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| 	/* Clear PA19 to trigger the hard reset */
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| 	writel(0x00080000, pio->PIO_CODR);
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| 	writel(0x00080000, pio->PIO_OER);
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| 	writel(0x00080000, pio->PIO_PER);
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| }
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| 
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| int dram_init (void)
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| {
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| 	gd->bd->bi_dram[0].start = PHYS_SDRAM;
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| 	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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| 	return 0;
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| }
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| 
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| #ifdef CONFIG_DRIVER_ETHER
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| #if defined(CONFIG_CMD_NET)
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| 
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| /*
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|  * Name:
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|  *	at91rm9200_GetPhyInterface
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|  * Description:
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|  *	Initialise the interface functions to the PHY
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|  * Arguments:
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|  *	None
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|  * Return value:
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|  *	None
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|  */
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| void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
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| {
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| 	p_phyops->Init = dm9161_InitPhy;
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| 	p_phyops->IsPhyConnected = dm9161_IsPhyConnected;
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| 	p_phyops->GetLinkSpeed = dm9161_GetLinkSpeed;
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| 	p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
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| }
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| 
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| #endif
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| #endif	/* CONFIG_DRIVER_ETHER */
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| 
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| /*
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|  * Disk On Chip (NAND) Millenium initialization.
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|  * The NAND lives in the CS2* space
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|  */
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| #if defined(CONFIG_CMD_NAND)
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| extern ulong nand_probe (ulong physadr);
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| 
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| #define AT91_SMARTMEDIA_BASE 0x40000000	/* physical address to access memory on NCS3 */
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| void nand_init (void)
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| {
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| 	/* Setup Smart Media, fitst enable the address range of CS3 */
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| 	*AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
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| 	/* set the bus interface characteristics based on
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| 	   tDS Data Set up Time 30 - ns
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| 	   tDH Data Hold Time 20 - ns
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| 	   tALS ALE Set up Time 20 - ns
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| 	   16ns at 60 MHz ~= 3  */
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| /*memory mapping structures */
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| #define SM_ID_RWH	(5 << 28)
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| #define SM_RWH		(1 << 28)
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| #define SM_RWS		(0 << 24)
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| #define SM_TDF		(1 << 8)
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| #define SM_NWS		(3)
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| 	AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
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| 		AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
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| 		SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
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| 
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| 	/* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
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| 	*AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
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| 		AT91C_PC3_BFBAA_SMWE;
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| 	*AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
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| 		AT91C_PC3_BFBAA_SMWE;
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| 
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| 	/* Configure PC2 as input (signal READY of the SmartMedia) */
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| 	*AT91C_PIOC_PER = AT91C_PC2_BFAVD;	/* enable direct output enable */
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| 	*AT91C_PIOC_ODR = AT91C_PC2_BFAVD;	/* disable output */
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| 
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| 	/* Configure PB1 as input (signal Card Detect of the SmartMedia) */
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| 	*AT91C_PIOB_PER = AT91C_PIO_PB1;	/* enable direct output enable */
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| 	*AT91C_PIOB_ODR = AT91C_PIO_PB1;	/* disable output */
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| 
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| 	/* PIOB and PIOC clock enabling */
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| 	*AT91C_PMC_PCER = 1 << AT91C_ID_PIOB;
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| 	*AT91C_PMC_PCER = 1 << AT91C_ID_PIOC;
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| 
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| 	if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
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| 		printf ("  No SmartMedia card inserted\n");
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| #ifdef DEBUG
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| 	printf ("  SmartMedia card inserted\n");
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| 
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| 	printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
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| #endif
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| 	printf ("%4lu MB\n", nand_probe(AT91_SMARTMEDIA_BASE) >> 20);
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| }
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| #endif
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