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Bryan Brattlof 708f54f583 soc: soc_ti_k3: update j721e revision numbering 
There is a 4 bit VARIANT number inside the JTAGID register that TI
increments any time a new variant for a chip is produced. Each
family of TI's SoCs uses a different versioning scheme based off
that VARIANT number.

CC: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
2022-02-08 09:41:27 -05:00
..
ti
soc: ti: pruss: Add a platform driver for PRUSS in TI SoCs
2021-07-15 17:56:04 +05:30
Kconfig
soc: xilinx: versal: Add soc_xilinx_versal driver
2021-08-26 08:08:11 +02:00
Makefile
soc: xilinx: versal: Add soc_xilinx_versal driver
2021-08-26 08:08:11 +02:00
soc_sandbox.c
test: Add tests for SOC uclass
2020-07-25 14:46:57 -06:00
soc_ti_k3.c
soc: soc_ti_k3: update j721e revision numbering
2022-02-08 09:41:27 -05:00
soc_xilinx_versal.c
soc: xilinx: versal: Add soc_xilinx_versal driver
2021-08-26 08:08:11 +02:00
soc_xilinx_zynqmp.c
soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driver
2021-08-26 08:08:11 +02:00
soc-uclass.c
dm: define LOG_CATEGORY for all uclass
2021-07-06 10:38:03 -06:00