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81a26131bd
Log the value of the regulators during initialization of the IO-domain driver to aid in debugging GPIO voltage configuration problems. Signed-off-by: Justin Klaassen <justin@tidylabs.net> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
383 lines
8.6 KiB
C
383 lines
8.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Rockchip IO Voltage Domain driver
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*
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* Ported from linux drivers/soc/rockchip/io-domain.c
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*/
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#include <dm.h>
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#include <dm/device_compat.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <power/regulator.h>
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#define MAX_SUPPLIES 16
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/*
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* The max voltage for 1.8V and 3.3V come from the Rockchip datasheet under
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* "Recommended Operating Conditions" for "Digital GPIO". When the typical
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* is 3.3V the max is 3.6V. When the typical is 1.8V the max is 1.98V.
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*
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* They are used like this:
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* - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
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* SoC we're at 3.3.
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* - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
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* that to be an error.
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*/
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#define MAX_VOLTAGE_1_8 1980000
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#define MAX_VOLTAGE_3_3 3600000
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#define PX30_IO_VSEL 0x180
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#define PX30_IO_VSEL_VCCIO6_SRC BIT(0)
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#define PX30_IO_VSEL_VCCIO6_SUPPLY_NUM 1
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#define RK3308_SOC_CON0 0x300
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#define RK3308_SOC_CON0_VCCIO3 BIT(8)
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#define RK3308_SOC_VCCIO3_SUPPLY_NUM 3
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#define RK3328_SOC_CON4 0x410
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#define RK3328_SOC_CON4_VCCIO2 BIT(7)
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#define RK3328_SOC_VCCIO2_SUPPLY_NUM 1
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#define RK3399_PMUGRF_CON0 0x180
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#define RK3399_PMUGRF_CON0_VSEL BIT(8)
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#define RK3399_PMUGRF_VSEL_SUPPLY_NUM 9
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#define RK3568_PMU_GRF_IO_VSEL0 0x0140
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#define RK3568_PMU_GRF_IO_VSEL1 0x0144
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#define RK3568_PMU_GRF_IO_VSEL2 0x0148
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struct rockchip_iodomain_soc_data {
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int grf_offset;
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const char *supply_names[MAX_SUPPLIES];
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int (*write)(struct regmap *grf, uint offset, int idx, int uV);
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};
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static int rk3568_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
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{
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u32 is_3v3 = uV > MAX_VOLTAGE_1_8;
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u32 val0, val1;
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int b;
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switch (idx) {
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case 0: /* pmuio1 */
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break;
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case 1: /* pmuio2 */
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b = idx;
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val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
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b = idx + 4;
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val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);
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regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val0);
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regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val1);
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break;
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case 3: /* vccio2 */
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break;
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case 2: /* vccio1 */
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case 4: /* vccio3 */
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case 5: /* vccio4 */
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case 6: /* vccio5 */
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case 7: /* vccio6 */
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case 8: /* vccio7 */
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b = idx - 1;
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val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
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val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);
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regmap_write(grf, RK3568_PMU_GRF_IO_VSEL0, val0);
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regmap_write(grf, RK3568_PMU_GRF_IO_VSEL1, val1);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int rockchip_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
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{
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u32 val;
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/* set value bit */
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val = (uV > MAX_VOLTAGE_1_8) ? 0 : 1;
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val <<= idx;
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/* apply hiword-mask */
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val |= (BIT(idx) << 16);
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return regmap_write(grf, offset, val);
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}
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static int px30_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
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{
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int ret = rockchip_iodomain_write(grf, offset, idx, uV);
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if (!ret && idx == PX30_IO_VSEL_VCCIO6_SUPPLY_NUM) {
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/*
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* set vccio6 iodomain to also use this framework
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* instead of a special gpio.
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*/
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u32 val = PX30_IO_VSEL_VCCIO6_SRC | (PX30_IO_VSEL_VCCIO6_SRC << 16);
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ret = regmap_write(grf, PX30_IO_VSEL, val);
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}
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return ret;
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}
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static int rk3308_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
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{
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int ret = rockchip_iodomain_write(grf, offset, idx, uV);
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if (!ret && idx == RK3308_SOC_VCCIO3_SUPPLY_NUM) {
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/*
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* set vccio3 iodomain to also use this framework
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* instead of a special gpio.
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*/
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u32 val = RK3308_SOC_CON0_VCCIO3 | (RK3308_SOC_CON0_VCCIO3 << 16);
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ret = regmap_write(grf, RK3308_SOC_CON0, val);
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}
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return ret;
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}
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static int rk3328_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
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{
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int ret = rockchip_iodomain_write(grf, offset, idx, uV);
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if (!ret && idx == RK3328_SOC_VCCIO2_SUPPLY_NUM) {
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/*
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* set vccio2 iodomain to also use this framework
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* instead of a special gpio.
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*/
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u32 val = RK3328_SOC_CON4_VCCIO2 | (RK3328_SOC_CON4_VCCIO2 << 16);
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ret = regmap_write(grf, RK3328_SOC_CON4, val);
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}
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return ret;
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}
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static int rk3399_pmu_iodomain_write(struct regmap *grf, uint offset, int idx, int uV)
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{
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int ret = rockchip_iodomain_write(grf, offset, idx, uV);
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if (!ret && idx == RK3399_PMUGRF_VSEL_SUPPLY_NUM) {
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/*
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* set pmu io iodomain to also use this framework
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* instead of a special gpio.
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*/
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u32 val = RK3399_PMUGRF_CON0_VSEL | (RK3399_PMUGRF_CON0_VSEL << 16);
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ret = regmap_write(grf, RK3399_PMUGRF_CON0, val);
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}
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return ret;
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}
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static const struct rockchip_iodomain_soc_data soc_data_px30 = {
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.grf_offset = 0x180,
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.supply_names = {
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NULL,
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"vccio6-supply",
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"vccio1-supply",
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"vccio2-supply",
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"vccio3-supply",
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"vccio4-supply",
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"vccio5-supply",
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"vccio-oscgpi-supply",
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},
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.write = px30_iodomain_write,
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};
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static const struct rockchip_iodomain_soc_data soc_data_px30_pmu = {
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.grf_offset = 0x100,
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.supply_names = {
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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"pmuio1-supply",
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"pmuio2-supply",
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},
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.write = rockchip_iodomain_write,
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};
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static const struct rockchip_iodomain_soc_data soc_data_rk3308 = {
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.grf_offset = 0x300,
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.supply_names = {
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"vccio0-supply",
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"vccio1-supply",
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"vccio2-supply",
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"vccio3-supply",
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"vccio4-supply",
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"vccio5-supply",
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},
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.write = rk3308_iodomain_write,
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};
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static const struct rockchip_iodomain_soc_data soc_data_rk3328 = {
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.grf_offset = 0x410,
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.supply_names = {
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"vccio1-supply",
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"vccio2-supply",
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"vccio3-supply",
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"vccio4-supply",
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"vccio5-supply",
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"vccio6-supply",
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"pmuio-supply",
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},
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.write = rk3328_iodomain_write,
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};
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static const struct rockchip_iodomain_soc_data soc_data_rk3399 = {
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.grf_offset = 0xe640,
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.supply_names = {
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"bt656-supply", /* APIO2_VDD */
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"audio-supply", /* APIO5_VDD */
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"sdmmc-supply", /* SDMMC0_VDD */
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"gpio1830-supply", /* APIO4_VDD */
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},
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.write = rockchip_iodomain_write,
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};
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static const struct rockchip_iodomain_soc_data soc_data_rk3399_pmu = {
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.grf_offset = 0x180,
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.supply_names = {
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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"pmu1830-supply", /* PMUIO2_VDD */
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},
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.write = rk3399_pmu_iodomain_write,
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};
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static const struct rockchip_iodomain_soc_data soc_data_rk3568_pmu = {
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.grf_offset = 0x140,
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.supply_names = {
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NULL,
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"pmuio2-supply",
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"vccio1-supply",
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NULL,
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"vccio3-supply",
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"vccio4-supply",
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"vccio5-supply",
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"vccio6-supply",
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"vccio7-supply",
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},
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.write = rk3568_iodomain_write,
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};
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static const struct udevice_id rockchip_iodomain_ids[] = {
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{
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.compatible = "rockchip,px30-io-voltage-domain",
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.data = (ulong)&soc_data_px30,
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},
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{
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.compatible = "rockchip,px30-pmu-io-voltage-domain",
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.data = (ulong)&soc_data_px30_pmu,
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},
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{
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.compatible = "rockchip,rk3308-io-voltage-domain",
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.data = (ulong)&soc_data_rk3308,
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},
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{
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.compatible = "rockchip,rk3328-io-voltage-domain",
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.data = (ulong)&soc_data_rk3328,
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},
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{
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.compatible = "rockchip,rk3399-io-voltage-domain",
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.data = (ulong)&soc_data_rk3399,
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},
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{
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.compatible = "rockchip,rk3399-pmu-io-voltage-domain",
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.data = (ulong)&soc_data_rk3399_pmu,
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},
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{
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.compatible = "rockchip,rk3568-pmu-io-voltage-domain",
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.data = (ulong)&soc_data_rk3568_pmu,
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},
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{ }
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};
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static int rockchip_iodomain_bind(struct udevice *dev)
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{
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/*
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* According to the Hardware Design Guide, IO-domain configuration must
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* be consistent with the power supply voltage (1.8V or 3.3V).
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* Probe after bind to configure IO-domain voltage early during boot.
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*/
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dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
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return 0;
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}
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static int rockchip_iodomain_probe(struct udevice *dev)
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{
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struct rockchip_iodomain_soc_data *soc_data =
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(struct rockchip_iodomain_soc_data *)dev_get_driver_data(dev);
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struct regmap *grf;
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int ret;
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grf = syscon_get_regmap(dev_get_parent(dev));
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if (IS_ERR(grf))
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return PTR_ERR(grf);
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for (int i = 0; i < MAX_SUPPLIES; i++) {
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const char *supply_name = soc_data->supply_names[i];
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struct udevice *reg;
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int uV;
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if (!supply_name)
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continue;
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ret = device_get_supply_regulator(dev, supply_name, ®);
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if (ret) {
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dev_dbg(dev, "%s: Regulator not found\n", supply_name);
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continue;
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}
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ret = regulator_autoset(reg);
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if (ret && ret != -EALREADY && ret != -EMEDIUMTYPE &&
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ret != -ENOSYS)
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continue;
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uV = regulator_get_value(reg);
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dev_dbg(dev, "%s: Regulator %s at %d uV\n", supply_name, reg->name, uV);
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if (uV <= 0)
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continue;
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if (uV > MAX_VOLTAGE_3_3) {
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dev_crit(dev, "%s: %d uV is too high. May damage SoC!\n",
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supply_name, uV);
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continue;
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}
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ret = soc_data->write(grf, soc_data->grf_offset, i, uV);
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if (ret)
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dev_err(dev, "%s: Couldn't write to GRF\n", supply_name);
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}
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return 0;
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}
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U_BOOT_DRIVER(rockchip_iodomain) = {
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.name = "rockchip_iodomain",
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.id = UCLASS_NOP,
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.of_match = rockchip_iodomain_ids,
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.bind = rockchip_iodomain_bind,
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.probe = rockchip_iodomain_probe,
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};
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