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Add support for loading the secure & non-secure pdi images and PL bitstream on the Versal Gen2 platform. The FPGA driver is enabled to load the bitstream in PDI format on the AMD Versal Gen2 device. PDI is the new programmable device image format for Versal Gen2, and the bitstream for the Versal Gen2 platform is generated exclusively in this format. With the enhanced SMC format in TF-A ensuring transparent payload forwarding for Versal Gen2, the u-boot driver must now handle the word swapping of PDI address that was previously done in TF-A for this API. The source code for the Versal2 loadpdi command and the CONFIG_CMD_VERSAL2 configuration has been removed. It now utilizes the fpga load <dev> <address> <length> command to load secure & non-secure pdi images. Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Link: https://lore.kernel.org/r/20250327105200.1262615-3-prasad.kummari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
55 lines
1.0 KiB
Plaintext
55 lines
1.0 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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if ARCH_VERSAL2
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config SYS_BOARD
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string "Board name"
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default "versal2"
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config SYS_VENDOR
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string "Vendor name"
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default "amd"
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config SYS_SOC
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default "versal2"
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config SYS_CONFIG_NAME
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string "Board configuration name"
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default "amd_versal2"
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help
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This option contains information about board configuration name.
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Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header
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will be used for board configuration.
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config COUNTER_FREQUENCY
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int "Timer clock frequency"
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default 0
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help
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Setup time clock frequency for certain platform
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config IOU_SWITCH_DIVISOR0
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hex "IOU switch divisor0"
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default 0x20
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help
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Setup time clock divisor for input clock.
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config SYS_MEM_RSVD_FOR_MMU
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bool "Reserve memory for MMU Table"
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help
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If defined this option is used to setup different space for
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MMU table than the one which will be allocated during
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relocation.
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config GICV3
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def_bool y
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config SYS_MALLOC_LEN
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default 0x2000000
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config ZYNQ_SDHCI_MAX_FREQ
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default 200000000
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source "board/xilinx/Kconfig"
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endif
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