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03de305ec4
As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
53 lines
1017 B
C
53 lines
1017 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2012
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* NVIDIA Inc, <www.nvidia.com>
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*
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* Allen Martin <amartin@nvidia.com>
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*/
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#include <debug_uart.h>
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#include <log.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/pinmux.h>
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#include <asm/arch/tegra.h>
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#include <asm/arch-tegra/apb_misc.h>
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#include <asm/arch-tegra/board.h>
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#include <asm/spl.h>
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#include "cpu.h"
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void spl_board_init(void)
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{
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struct apb_misc_pp_ctlr *apb_misc =
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(struct apb_misc_pp_ctlr *)NV_PA_APB_MISC_BASE;
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/* enable JTAG */
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writel(0xC0, &apb_misc->cfg_ctl);
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board_init_uart_f();
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/* Initialize periph GPIOs */
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gpio_early_init_uart();
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clock_early_init();
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#ifdef CONFIG_DEBUG_UART
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debug_uart_init();
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#endif
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preloader_console_init();
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}
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_RAM;
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}
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void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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{
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debug("image entry point: 0x%lX\n", spl_image->entry_point);
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start_cpu((u32)spl_image->entry_point);
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halt_avp();
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}
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