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e8e39d6cd5
Provide basic DRAM info population from DT, cache setting and the board_init stub. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Caleb Connolly <caleb.connolly@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
44 lines
646 B
C
44 lines
646 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* CPU code for Qualcomm IPQ40xx SoC
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*
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* Copyright (c) 2024 Sartura Ltd.
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*
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* Author: Robert Marko <robert.marko@sartura.hr>
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*/
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#include <cpu_func.h>
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#include <init.h>
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int dram_init(void)
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{
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int ret;
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ret = fdtdec_setup_memory_banksize();
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if (ret)
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return ret;
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return fdtdec_setup_mem_size_base();
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}
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/*
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* Enable/Disable D-cache.
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* I-cache is already enabled in start.S
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*/
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void enable_caches(void)
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{
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dcache_enable();
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}
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void disable_caches(void)
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{
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dcache_disable();
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}
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/*
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* In case boards need specific init code, they can override this stub.
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*/
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int __weak board_init(void)
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{
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return 0;
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}
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