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08b27fce29
Add initial support for Marvell PXA1908. The SoC has 4 Cortex-A53 cores, a GC7000UL GPU and a variety of peripheral controllers. Signed-off-by: Duje Mihanović <duje.mihanovic@skole.hr> Reviewed-by: Stefan Roese <sr@denx.de>
107 lines
2.3 KiB
Plaintext
107 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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/dts-v1/;
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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model = "Marvell Armada PXA1908";
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compatible = "marvell,pxa1908";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&gic>;
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0 0>;
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enable-method = "psci";
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0 1>;
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enable-method = "psci";
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0 2>;
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enable-method = "psci";
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0 3>;
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enable-method = "psci";
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};
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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gic: interrupt-controller@d1df9000 {
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compatible = "arm,gic-400";
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reg = <0 0xd1df9000 0 0x1000>,
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<0 0xd1dfa000 0 0x2000>,
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/* The subsequent registers are guesses. */
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<0 0xd1dfc000 0 0x2000>,
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<0 0xd1dfe000 0 0x2000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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interrupt-controller;
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#interrupt-cells = <3>;
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};
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apb@d4000000 {
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compatible = "simple-bus";
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reg = <0 0xd4000000 0 0x200000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0xd4000000 0x200000>;
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uart0: serial@17000 {
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compatible = "mrvl,mmp-uart", "intel,xscale-uart";
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reg = <0x17000 0x1000>;
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clock-frequency = <14745600>;
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reg-shift = <2>;
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};
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uart1: serial@18000 {
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compatible = "mrvl,mmp-uart", "intel,xscale-uart";
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reg = <0x18000 0x1000>;
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clock-frequency = <14745600>;
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reg-shift = <2>;
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};
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uart2: serial@36000 {
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compatible = "mrvl,mmp-uart", "intel,xscale-uart";
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reg = <0x36000 0x1000>;
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clock-frequency = <117000000>;
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reg-shift = <2>;
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};
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};
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};
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};
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