mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2025-09-01 03:51:31 +02:00
fcc9e4810e
I don't see a reason why this should only be enabled on a per-board basis. The rng IP is inside the SoC and doesn't seem to rely on anything external to it, therefore let's enable it on the SoC DTSI and remove the now empty px30-evb-u-boot.dtsi. Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
118 lines
1.5 KiB
Plaintext
118 lines
1.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* (C) Copyright 2019 Rockchip Electronics Co., Ltd
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*/
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#include "rockchip-u-boot.dtsi"
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/ {
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aliases {
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mmc0 = &emmc;
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mmc1 = &sdmmc;
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};
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chosen {
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u-boot,spl-boot-order = &emmc, &sdmmc;
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};
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dmc {
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bootph-all;
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compatible = "rockchip,px30-dmc", "syscon";
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reg = <0x0 0xff2a0000 0x0 0x1000>;
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};
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rng: rng@ff0b0000 {
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compatible = "rockchip,cryptov2-rng";
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reg = <0x0 0xff0b0000 0x0 0x4000>;
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};
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};
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&uart2 {
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clock-frequency = <24000000>;
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bootph-all;
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};
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&uart2m0_xfer {
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bootph-all;
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};
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&uart5 {
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clock-frequency = <24000000>;
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bootph-all;
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};
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&uart5_cts {
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bootph-all;
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};
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&uart5_rts {
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bootph-all;
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};
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&uart5_xfer {
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bootph-all;
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};
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&sdmmc {
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bootph-all;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&emmc {
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bootph-all;
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/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
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u-boot,spl-fifo-mode;
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};
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&grf {
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bootph-all;
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};
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&pmugrf {
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bootph-all;
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};
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&xin24m {
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bootph-all;
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};
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&cru {
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bootph-all;
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-rates;
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};
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&pmucru {
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bootph-all;
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/delete-property/ assigned-clocks;
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/delete-property/ assigned-clock-rates;
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};
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&saradc {
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bootph-all;
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status = "okay";
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};
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&gpio0 {
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bootph-all;
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gpio-ranges = <&pinctrl 0 0 32>;
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};
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&gpio1 {
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bootph-all;
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gpio-ranges = <&pinctrl 0 32 32>;
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};
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&gpio2 {
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bootph-all;
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gpio-ranges = <&pinctrl 0 64 32>;
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};
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&gpio3 {
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bootph-all;
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gpio-ranges = <&pinctrl 0 96 32>;
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};
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