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	The stm32 gpio driver private data are not needed in arch include files, they are not used by code except for stm32 gpio and pincontrol drivers, using the same IP; the defines for this IP is moved in a new file "stm32_gpio_priv.h" in driver/gpio. This patch avoids to have duplicated file gpio.h for each SOC in MPU directory mach-stm32mp and in each MCU directory arch-stm32* and allows to remove CONFIG_GPIO_EXTRA_HEADER for all STM32. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
		
			
				
	
	
		
			87 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			87 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0+ */
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| /*
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|  * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
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|  * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
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|  */
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| 
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| #ifndef _STM32_GPIO_PRIV_H_
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| #define _STM32_GPIO_PRIV_H_
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| 
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| enum stm32_gpio_mode {
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| 	STM32_GPIO_MODE_IN = 0,
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| 	STM32_GPIO_MODE_OUT,
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| 	STM32_GPIO_MODE_AF,
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| 	STM32_GPIO_MODE_AN
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| };
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| 
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| enum stm32_gpio_otype {
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| 	STM32_GPIO_OTYPE_PP = 0,
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| 	STM32_GPIO_OTYPE_OD
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| };
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| 
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| enum stm32_gpio_speed {
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| 	STM32_GPIO_SPEED_2M = 0,
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| 	STM32_GPIO_SPEED_25M,
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| 	STM32_GPIO_SPEED_50M,
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| 	STM32_GPIO_SPEED_100M
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| };
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| 
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| enum stm32_gpio_pupd {
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| 	STM32_GPIO_PUPD_NO = 0,
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| 	STM32_GPIO_PUPD_UP,
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| 	STM32_GPIO_PUPD_DOWN
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| };
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| 
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| enum stm32_gpio_af {
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| 	STM32_GPIO_AF0 = 0,
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| 	STM32_GPIO_AF1,
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| 	STM32_GPIO_AF2,
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| 	STM32_GPIO_AF3,
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| 	STM32_GPIO_AF4,
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| 	STM32_GPIO_AF5,
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| 	STM32_GPIO_AF6,
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| 	STM32_GPIO_AF7,
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| 	STM32_GPIO_AF8,
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| 	STM32_GPIO_AF9,
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| 	STM32_GPIO_AF10,
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| 	STM32_GPIO_AF11,
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| 	STM32_GPIO_AF12,
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| 	STM32_GPIO_AF13,
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| 	STM32_GPIO_AF14,
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| 	STM32_GPIO_AF15
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| };
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| 
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| struct stm32_gpio_dsc {
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| 	u8	port;
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| 	u8	pin;
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| };
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| 
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| struct stm32_gpio_ctl {
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| 	enum stm32_gpio_mode	mode;
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| 	enum stm32_gpio_otype	otype;
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| 	enum stm32_gpio_speed	speed;
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| 	enum stm32_gpio_pupd	pupd;
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| 	enum stm32_gpio_af	af;
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| };
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| 
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| struct stm32_gpio_regs {
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| 	u32 moder;	/* GPIO port mode */
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| 	u32 otyper;	/* GPIO port output type */
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| 	u32 ospeedr;	/* GPIO port output speed */
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| 	u32 pupdr;	/* GPIO port pull-up/pull-down */
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| 	u32 idr;	/* GPIO port input data */
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| 	u32 odr;	/* GPIO port output data */
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| 	u32 bsrr;	/* GPIO port bit set/reset */
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| 	u32 lckr;	/* GPIO port configuration lock */
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| 	u32 afr[2];	/* GPIO alternate function */
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| };
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| 
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| struct stm32_gpio_priv {
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| 	struct stm32_gpio_regs *regs;
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| 	unsigned int gpio_range;
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| };
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| 
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| int stm32_offset_to_index(struct udevice *dev, unsigned int offset);
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| 
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| #endif /* _STM32_GPIO_PRIV_H_ */
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