Bharat Bhushan 5344c7b783 arvm8: pcie-layerscape: Define stream-ids for Layerscape Chassis-2 ...

Layerscape Chassis-2 have PCIe device, some platform devices and
DPAA1 devices which will use stream-ids for iommu level isolation
as they are behind SMMU.

This patch defines the stream-ids for Chassis-2 devices. DPAA1 is
reserved for future use.

Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

2017-03-28 10:47:16 -07:00

..

clock.h

armv8/fsl_lsch3: Change arch to fsl-layerscape

2015-10-29 10:34:00 -07:00

config.h

armv8: layerscape: Rewrite memory reservation

2017-03-14 08:44:03 -07:00

cpu.h

armv8: layerscape: Update early MMU for DDR after initialization

2017-03-14 08:44:03 -07:00

fdt.h

armv8/layerscape: remove unnecessary function declares

2017-01-18 09:24:51 -08:00

fsl_serdes.h

arm: fsl-layerscape: Move QSGMII wriop_init to SoC file

2017-03-28 09:08:25 -07:00

immap_lsch2.h

armv8/ls1043a: fixup GIC offset for ls1043a rev1

2017-01-18 09:29:21 -08:00

immap_lsch3.h

armv8:fsl-layerscape: Avoid RCWSR28 register hard-coding

2017-03-28 09:09:22 -07:00

imx-regs.h

serial: lpuart: restructure lpuart driver

2017-03-17 09:27:08 +01:00

mmu.h

armv8: layerscape: Update early MMU for DDR after initialization

2017-03-14 08:44:03 -07:00

mp.h

armv8: fsl-layerscape: SMP support for loading 32-bit OS

2016-11-22 11:40:24 -08:00

ns_access.h

fsl: csu: add an API to set R/W permission to PCIe

2016-09-14 14:07:08 -07:00

ppa.h

fsl-layerscape/ppa: cleanup ppa.h

2017-03-28 08:59:47 -07:00

soc.h

armv8/ls1043a: fixup GIC offset for ls1043a rev1

2017-01-18 09:29:21 -08:00

speed.h

armv8/fsl_lsch3: Change arch to fsl-layerscape

2015-10-29 10:34:00 -07:00

stream_id_lsch2.h

arvm8: pcie-layerscape: Define stream-ids for Layerscape Chassis-2

2017-03-28 10:47:16 -07:00

stream_id_lsch3.h

armv8: fsl-lsch3: Rewrite comment for stream IDs

2017-03-28 10:44:47 -07:00