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20c34115d6
Now that we have added Quark MRC codes, call MRC in dram_init() so that DRAM can be initialized on a Quark based board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
135 lines
3.7 KiB
C
135 lines
3.7 KiB
C
/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <errno.h>
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#include <fdtdec.h>
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#include <asm/post.h>
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#include <asm/arch/mrc.h>
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#include <asm/arch/quark.h>
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DECLARE_GLOBAL_DATA_PTR;
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static int mrc_configure_params(struct mrc_params *mrc_params)
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{
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const void *blob = gd->fdt_blob;
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int node;
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int mrc_flags;
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node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_QRK_MRC);
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if (node < 0) {
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debug("%s: Cannot find MRC node\n", __func__);
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return -EINVAL;
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}
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/*
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* TODO:
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*
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* We need support fast boot (MRC cache) in the future.
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*
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* Set boot mode to cold boot for now
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*/
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mrc_params->boot_mode = BM_COLD;
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/*
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* TODO:
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*
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* We need determine ECC by pin strap state
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*
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* Disable ECC by default for now
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*/
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mrc_params->ecc_enables = 0;
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mrc_flags = fdtdec_get_int(blob, node, "flags", 0);
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if (mrc_flags & MRC_FLAG_SCRAMBLE_EN)
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mrc_params->scrambling_enables = 1;
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else
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mrc_params->scrambling_enables = 0;
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mrc_params->dram_width = fdtdec_get_int(blob, node, "dram-width", 0);
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mrc_params->ddr_speed = fdtdec_get_int(blob, node, "dram-speed", 0);
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mrc_params->ddr_type = fdtdec_get_int(blob, node, "dram-type", 0);
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mrc_params->rank_enables = fdtdec_get_int(blob, node, "rank-mask", 0);
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mrc_params->channel_enables = fdtdec_get_int(blob, node,
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"chan-mask", 0);
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mrc_params->channel_width = fdtdec_get_int(blob, node,
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"chan-width", 0);
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mrc_params->address_mode = fdtdec_get_int(blob, node, "addr-mode", 0);
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mrc_params->refresh_rate = fdtdec_get_int(blob, node,
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"refresh-rate", 0);
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mrc_params->sr_temp_range = fdtdec_get_int(blob, node,
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"sr-temp-range", 0);
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mrc_params->ron_value = fdtdec_get_int(blob, node,
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"ron-value", 0);
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mrc_params->rtt_nom_value = fdtdec_get_int(blob, node,
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"rtt-nom-value", 0);
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mrc_params->rd_odt_value = fdtdec_get_int(blob, node,
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"rd-odt-value", 0);
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mrc_params->params.density = fdtdec_get_int(blob, node,
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"dram-density", 0);
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mrc_params->params.cl = fdtdec_get_int(blob, node, "dram-cl", 0);
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mrc_params->params.ras = fdtdec_get_int(blob, node, "dram-ras", 0);
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mrc_params->params.wtr = fdtdec_get_int(blob, node, "dram-wtr", 0);
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mrc_params->params.rrd = fdtdec_get_int(blob, node, "dram-rrd", 0);
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mrc_params->params.faw = fdtdec_get_int(blob, node, "dram-faw", 0);
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debug("MRC dram_width %d\n", mrc_params->dram_width);
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debug("MRC rank_enables %d\n", mrc_params->rank_enables);
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debug("MRC ddr_speed %d\n", mrc_params->ddr_speed);
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debug("MRC flags: %s\n",
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(mrc_params->scrambling_enables) ? "SCRAMBLE_EN" : "");
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debug("MRC density=%d tCL=%d tRAS=%d tWTR=%d tRRD=%d tFAW=%d\n",
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mrc_params->params.density, mrc_params->params.cl,
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mrc_params->params.ras, mrc_params->params.wtr,
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mrc_params->params.rrd, mrc_params->params.faw);
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return 0;
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}
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int dram_init(void)
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{
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struct mrc_params mrc_params;
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int ret;
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memset(&mrc_params, 0, sizeof(struct mrc_params));
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ret = mrc_configure_params(&mrc_params);
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if (ret)
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return ret;
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/* Set up the DRAM by calling the memory reference code */
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mrc_init(&mrc_params);
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if (mrc_params.status)
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return -EIO;
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gd->ram_size = mrc_params.mem_size;
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post_code(POST_DRAM);
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return 0;
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}
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void dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = 0;
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gd->bd->bi_dram[0].size = gd->ram_size;
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}
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/*
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* This function looks for the highest region of memory lower than 4GB which
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* has enough space for U-Boot where U-Boot is aligned on a page boundary.
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* It overrides the default implementation found elsewhere which simply
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* picks the end of ram, wherever that may be. The location of the stack,
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* the relocation address, and how far U-Boot is moved by relocation are
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* set in the global data structure.
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*/
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ulong board_get_usable_ram_top(ulong total_size)
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{
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return gd->ram_size;
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}
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