Tom Rini 278be62c05 AMD/Xilinx/FPGA changes for v2025.07-rc1
AMD/Xilinx:
 - Synchronize enums around tcm_mode
 - Access bootmode registers via firmware interface
 - Setup default values for DEBUG_UART
 - Fix dfu alt buffer clearing
 - Convert loadpdi command to fpga
 - Fix board detection code
 - Minor defconfig updates
 
 Versal:
 - Wire multi_boot register
 
 Versal Gen 2:
 - Enable missing drivers
 - Wire i2c FRU decoding at start
 - Wire saving variables to different locations
 - Disable default DEBUG_UART
 - Wire USB/UFS boot and fix access via firmware interface
 - Minor fixes
 
 ZynqMP/Kria:
 - Enable mkfwumdata
 - Topic board update
 - Enhance binman configurations
 - Kria usb update
 
 BuR:
 - Add multiple Zynq based boards
 
 cadence_ospi:
 - Enable device reset
 
 fpga:
 - Add support for loading bitstream for Altera SoCs
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCaADT3QAKCRDKSWXLKUoM
 IacxAKCQ8KNhtc2MS9zBmFJg6XEo8N0GygCeOZTgjbQe7T3orrkAMATjCBHw6vE=
 =dRFT
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2025.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx/FPGA changes for v2025.07-rc1

AMD/Xilinx:
- Synchronize enums around tcm_mode
- Access bootmode registers via firmware interface
- Setup default values for DEBUG_UART
- Fix dfu alt buffer clearing
- Convert loadpdi command to fpga
- Fix board detection code
- Minor defconfig updates

Versal:
- Wire multi_boot register

Versal Gen 2:
- Enable missing drivers
- Wire i2c FRU decoding at start
- Wire saving variables to different locations
- Disable default DEBUG_UART
- Wire USB/UFS boot and fix access via firmware interface
- Minor fixes

ZynqMP/Kria:
- Enable mkfwumdata
- Topic board update
- Enhance binman configurations
- Kria usb update

BuR:
- Add multiple Zynq based boards

cadence_ospi:
- Enable device reset

fpga:
- Add support for loading bitstream for Altera SoCs
2025-04-17 07:52:02 -06:00
..
2025-02-11 20:12:36 -06:00
2024-10-17 03:12:47 +02:00
2025-01-22 15:58:03 -06:00
2024-07-29 15:01:04 -06:00
2024-10-24 11:20:58 -06:00
2024-08-26 14:05:38 -06:00
2025-04-03 11:43:22 -06:00
2024-02-13 15:38:49 -05:00
2024-07-29 15:01:04 -06:00
2025-03-24 08:51:34 -03:00
2024-11-20 17:57:58 +01:00
2024-07-29 15:01:04 -06:00
2025-01-05 02:30:49 +01:00
2024-06-14 12:59:07 -06:00
2025-04-02 20:00:59 -06:00
2024-07-29 15:01:04 -06:00
2025-03-07 11:50:22 -06:00
2024-09-24 13:41:20 -06:00
2025-02-05 16:22:55 +01:00
2025-04-02 20:00:59 -06:00
2024-07-29 15:01:04 -06:00
2024-07-29 15:01:04 -06:00
2024-07-29 15:01:04 -06:00
2024-07-29 15:01:04 -06:00
2024-08-13 06:23:15 +02:00
2025-03-10 07:41:16 +01:00
2024-12-31 10:58:30 -06:00
2025-01-26 11:06:56 +01:00
2025-04-03 11:41:54 -06:00
2024-07-29 15:01:04 -06:00
2025-04-03 16:54:49 -06:00
2024-11-04 16:41:38 -06:00
2024-07-29 15:01:04 -06:00
2025-03-11 23:06:18 +01:00
2024-07-29 15:01:04 -06:00
2024-10-24 11:21:48 -06:00
2024-07-29 15:01:04 -06:00
2024-07-29 15:01:04 -06:00
2025-04-08 11:43:23 -06:00
2024-11-25 23:07:37 -03:00
2024-09-30 17:48:12 -06:00
2024-11-20 17:57:58 +01:00
2025-03-19 03:38:51 +01:00
2025-04-10 22:32:55 -03:00
2024-09-12 17:35:37 +02:00
2025-04-10 20:55:53 -06:00
2025-03-10 07:41:16 +01:00
2025-01-14 14:29:29 -06:00
2024-07-29 15:01:04 -06:00
2025-04-16 19:57:19 -06:00
2025-02-28 08:41:54 -06:00
2024-07-29 15:01:04 -06:00
2025-02-11 20:10:58 -06:00
2025-01-07 15:45:51 +02:00
2025-01-01 10:40:33 -06:00
2024-07-29 15:01:04 -06:00
2024-07-29 15:01:04 -06:00
2025-02-03 16:01:36 -06:00
2024-11-13 08:14:23 -06:00
2024-07-29 15:01:04 -06:00