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818055fd4e
Add support for hardware watchdog timer for Amlogic SoCs. This driver has been heavily inspired by his Linux equivalent (meson_gxbb_wdt.c). Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Philippe Boos <pboos@baylibre.com> Reviewed-by: Stefan Roese <sr@denx.de>
137 lines
3.0 KiB
C
137 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2022 BayLibre, SAS.
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*/
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#include <clk.h>
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#include <dm.h>
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#include <dm/device_compat.h>
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#include <reset.h>
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#include <wdt.h>
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#include <asm/io.h>
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#include <linux/bitops.h>
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#define GXBB_WDT_CTRL_REG 0x0
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#define GXBB_WDT_TCNT_REG 0x8
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#define GXBB_WDT_RSET_REG 0xc
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#define GXBB_WDT_CTRL_SYS_RESET_NOW BIT(26)
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#define GXBB_WDT_CTRL_CLKDIV_EN BIT(25)
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#define GXBB_WDT_CTRL_CLK_EN BIT(24)
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#define GXBB_WDT_CTRL_EE_RESET BIT(21)
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#define GXBB_WDT_CTRL_EN BIT(18)
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#define GXBB_WDT_CTRL_DIV_MASK GENMASK(17, 0)
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#define GXBB_WDT_TCNT_SETUP_MASK GENMASK(15, 0)
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struct amlogic_wdt_priv {
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void __iomem *reg_base;
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};
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static int amlogic_wdt_set_timeout(struct udevice *dev, u64 timeout_ms)
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{
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struct amlogic_wdt_priv *data = dev_get_priv(dev);
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if (timeout_ms > GXBB_WDT_TCNT_SETUP_MASK) {
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dev_warn(dev, "%s: timeout_ms=%llu: maximum watchdog timeout exceeded\n",
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__func__, timeout_ms);
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timeout_ms = GXBB_WDT_TCNT_SETUP_MASK;
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}
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writel(timeout_ms, data->reg_base + GXBB_WDT_TCNT_REG);
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return 0;
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}
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static int amlogic_wdt_stop(struct udevice *dev)
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{
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struct amlogic_wdt_priv *data = dev_get_priv(dev);
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writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) & ~GXBB_WDT_CTRL_EN,
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data->reg_base + GXBB_WDT_CTRL_REG);
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return 0;
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}
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static int amlogic_wdt_start(struct udevice *dev, u64 time_ms, ulong flags)
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{
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struct amlogic_wdt_priv *data = dev_get_priv(dev);
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writel(readl(data->reg_base + GXBB_WDT_CTRL_REG) | GXBB_WDT_CTRL_EN,
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data->reg_base + GXBB_WDT_CTRL_REG);
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return amlogic_wdt_set_timeout(dev, time_ms);
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}
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static int amlogic_wdt_reset(struct udevice *dev)
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{
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struct amlogic_wdt_priv *data = dev_get_priv(dev);
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writel(0, data->reg_base + GXBB_WDT_RSET_REG);
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return 0;
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}
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static int amlogic_wdt_expire_now(struct udevice *dev, ulong flags)
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{
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struct amlogic_wdt_priv *data = dev_get_priv(dev);
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writel(0, data->reg_base + GXBB_WDT_CTRL_SYS_RESET_NOW);
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return 0;
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}
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static int amlogic_wdt_probe(struct udevice *dev)
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{
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struct amlogic_wdt_priv *data = dev_get_priv(dev);
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int ret;
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data->reg_base = dev_remap_addr(dev);
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if (!data->reg_base)
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return -EINVAL;
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struct clk clk;
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ret = clk_get_by_index(dev, 0, &clk);
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if (ret)
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return ret;
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ret = clk_enable(&clk);
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if (ret) {
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clk_free(&clk);
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return ret;
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}
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/* Setup with 1ms timebase */
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writel(((clk_get_rate(&clk) / 1000) & GXBB_WDT_CTRL_DIV_MASK) |
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GXBB_WDT_CTRL_EE_RESET |
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GXBB_WDT_CTRL_CLK_EN |
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GXBB_WDT_CTRL_CLKDIV_EN,
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data->reg_base + GXBB_WDT_CTRL_REG);
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return 0;
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}
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static const struct wdt_ops amlogic_wdt_ops = {
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.start = amlogic_wdt_start,
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.reset = amlogic_wdt_reset,
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.stop = amlogic_wdt_stop,
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.expire_now = amlogic_wdt_expire_now,
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};
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static const struct udevice_id amlogic_wdt_ids[] = {
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{ .compatible = "amlogic,meson-gxbb-wdt" },
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{}
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};
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U_BOOT_DRIVER(amlogic_wdt) = {
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.name = "amlogic_wdt",
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.id = UCLASS_WDT,
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.of_match = amlogic_wdt_ids,
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.priv_auto = sizeof(struct amlogic_wdt_priv),
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.probe = amlogic_wdt_probe,
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.ops = &amlogic_wdt_ops,
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.flags = DM_FLAG_PRE_RELOC,
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};
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