Bin Meng 05b98ec346 x86: quark: Implement PIRQ routing ...

Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are harcoded and cannot be changed freely.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

2015-06-04 02:39:39 -06:00

..

car.S

x86: quark: Add Cache-As-RAM initialization

2015-02-06 12:07:41 -07:00

dram.c

x86: quark: Call MRC in dram_init()

2015-02-06 12:07:44 -07:00

hte.c

x86: quark: MRC codes clean up

2015-03-24 21:22:37 -06:00

hte.h

x86: quark: MRC codes clean up

2015-03-24 21:22:37 -06:00

Kconfig

x86: quark: Bypass TSC calibration

2015-02-06 12:07:42 -07:00

Makefile

x86: quark: Enable the Memory Reference Code build

2015-02-06 12:07:43 -07:00

mrc_util.c

x86: quark: MRC codes clean up

2015-03-24 21:22:37 -06:00

mrc_util.h

x86: quark: MRC codes clean up

2015-03-24 21:22:37 -06:00

mrc.c

arch/x86/cpu/quark/mrc.c: Switch to U_BOOT_DATE / U_BOOT_TIME

2015-03-24 21:22:37 -06:00

msg_port.c

x86: quark: Add routines to access message bus registers

2015-02-06 12:07:40 -07:00

pci.c

x86: Add basic Intel Quark processor support

2015-02-06 12:07:41 -07:00

quark.c

x86: quark: Implement PIRQ routing

2015-06-04 02:39:39 -06:00

smc.c

x86: quark: MRC codes clean up

2015-03-24 21:22:37 -06:00

smc.h

x86: quark: MRC codes clean up

2015-03-24 21:22:37 -06:00