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	The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on the 1.5 version of the i.Core MX6 cpu module. The 1.5 version differs from the original one for a few details, including the ethernet PHY interface clock provider. With this commit, the ethernet interface works properly: SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver While before using the 1.5 version, ethernet failed to startup do to un-clocked PHY interface: fec 2188000.ethernet eth0: could not attach to PHY Similar fix has merged for i.Core MX6Q but missed to update for DL. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
		
			
				
	
	
		
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			26 lines
		
	
	
		
			456 B
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0 OR X11
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| /*
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|  * Copyright (C) 2018 Engicam S.r.l.
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|  * Copyright (C) 2018 Amarula Solutions B.V.
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|  * Author: Jagan Teki <jagan@amarulasolutions.com>
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|  */
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| 
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| /dts-v1/;
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| 
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| #include "imx6dl.dtsi"
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| #include "imx6qdl-icore-1.5.dtsi"
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| 
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| / {
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| 	model = "Engicam i.CoreM6 DualLite/Solo MIPI Starter Kit";
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| 	compatible = "engicam,imx6-icore", "fsl,imx6dl";
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| };
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| 
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| &hdmi {
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| 	ddc-i2c-bus = <&i2c2>;
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| 	status = "okay";
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| };
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| 
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| &usdhc3 {
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| 	status = "okay";
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| };
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