Alif Zakuan Yuslaimi 1e354de7fc ddr: altera: agilex: Get ACF from boot scratch register ...

The DDR data rate must be set correctly in the DDRIOCTRL
register according to the Actual Clock Frequency (ACF) value.

By enabling the reading of ACF value from bit 18 of the boot
scratch register during initialization, the DDR data rate is
able to be configured accurately.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>

2025-08-08 22:20:49 +08:00

..

altera

ddr: altera: agilex: Get ACF from boot scratch register

2025-08-08 22:20:49 +08:00

fsl

drivers: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

2024-10-11 11:44:48 -06:00

imx

imx: Use per board ddrphy_trained_csr

2024-12-23 08:10:15 -03:00

marvell

ddr: marvell: a38x: Fix unsigned issues

2025-07-29 08:44:18 +02:00

microchip

Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"

2024-05-20 13:35:03 -06:00

Kconfig

Convert CONFIG_SPD_EEPROM to Kconfig

2022-12-05 16:08:37 -05:00