mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2025-11-03 18:01:41 +01:00
4a5517094d
- add support for Altera Nios-32 CPU
- add support for Nios Cyclone Development Kit (DK-1C20)
* Patch by Steven Scholz, 29 Sep 2003:
- A second parameter for bootm overwrites the load address for
"Standalone Application" images.
- bootm sets environment variable "filesize" to the resulting
(uncompressed) data length for "Standalone Application" images
when autostart is set to "no". Now you can do something like
if bootm $fpgadata $some_free_ram ; then
fpga load 0 $some_free_ram $filesize
fi
* Patch by Denis Peter, 25 Sept 2003:
add support for the MIP405 Rev. C board
102 lines
1.6 KiB
C
102 lines
1.6 KiB
C
/*
|
|
* This file is part of GNU CC.
|
|
*
|
|
* GNU CC is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published
|
|
* by the Free Software Foundation; either version 2, or (at your
|
|
* option) any later version.
|
|
*
|
|
* GNU CC is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public
|
|
* License along with GNU CC; see the file COPYING. If not, write
|
|
* to the Free Software Foundation, 59 Temple Place - Suite 330,
|
|
* Boston, MA 02111-1307, USA.
|
|
*/
|
|
|
|
|
|
#include "math.h"
|
|
|
|
USItype udivmodsi4 (USItype num, USItype den, word_type modwanted)
|
|
{
|
|
USItype bit = 1;
|
|
USItype res = 0;
|
|
|
|
while (den < num && bit && !(den & (1L << 31))) {
|
|
den <<= 1;
|
|
bit <<= 1;
|
|
}
|
|
while (bit) {
|
|
if (num >= den) {
|
|
num -= den;
|
|
res |= bit;
|
|
}
|
|
bit >>= 1;
|
|
den >>= 1;
|
|
}
|
|
if (modwanted)
|
|
return num;
|
|
return res;
|
|
}
|
|
|
|
|
|
SItype __divsi3 (SItype a, SItype b)
|
|
{
|
|
word_type neg = 0;
|
|
SItype res;
|
|
|
|
if (a < 0) {
|
|
a = -a;
|
|
neg = !neg;
|
|
}
|
|
|
|
if (b < 0) {
|
|
b = -b;
|
|
neg = !neg;
|
|
}
|
|
|
|
res = udivmodsi4 (a, b, 0);
|
|
|
|
if (neg)
|
|
res = -res;
|
|
|
|
return res;
|
|
}
|
|
|
|
|
|
SItype __modsi3 (SItype a, SItype b)
|
|
{
|
|
word_type neg = 0;
|
|
SItype res;
|
|
|
|
if (a < 0) {
|
|
a = -a;
|
|
neg = 1;
|
|
}
|
|
|
|
if (b < 0)
|
|
b = -b;
|
|
|
|
res = udivmodsi4 (a, b, 1);
|
|
|
|
if (neg)
|
|
res = -res;
|
|
|
|
return res;
|
|
}
|
|
|
|
|
|
SItype __udivsi3 (SItype a, SItype b)
|
|
{
|
|
return udivmodsi4 (a, b, 0);
|
|
}
|
|
|
|
|
|
SItype __umodsi3 (SItype a, SItype b)
|
|
{
|
|
return udivmodsi4 (a, b, 1);
|
|
}
|