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166bc7fba0
i.MX8ULP lpuart has same register layout as i.MX7ULP and i.MX8 Signed-off-by: Peng Fan <peng.fan@nxp.com>
73 lines
1.2 KiB
C
73 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*
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*/
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#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8) || \
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defined(CONFIG_ARCH_IMXRT) || defined(CONFIG_ARCH_IMX8ULP)
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struct lpuart_fsl_reg32 {
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u32 verid;
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u32 param;
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u32 global;
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u32 pincfg;
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u32 baud;
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u32 stat;
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u32 ctrl;
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u32 data;
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u32 match;
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u32 modir;
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u32 fifo;
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u32 water;
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};
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#else
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struct lpuart_fsl_reg32 {
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u32 baud;
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u32 stat;
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u32 ctrl;
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u32 data;
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u32 match;
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u32 modir;
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u32 fifo;
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u32 water;
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};
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#endif
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struct lpuart_fsl {
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u8 ubdh;
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u8 ubdl;
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u8 uc1;
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u8 uc2;
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u8 us1;
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u8 us2;
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u8 uc3;
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u8 ud;
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u8 uma1;
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u8 uma2;
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u8 uc4;
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u8 uc5;
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u8 ued;
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u8 umodem;
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u8 uir;
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u8 reserved;
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u8 upfifo;
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u8 ucfifo;
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u8 usfifo;
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u8 utwfifo;
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u8 utcfifo;
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u8 urwfifo;
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u8 urcfifo;
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u8 rsvd[28];
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};
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/* Used on i.MX7ULP */
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#define LPUART_BAUD_BOTHEDGE_MASK (0x20000)
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#define LPUART_BAUD_OSR_MASK (0x1F000000)
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#define LPUART_BAUD_OSR_SHIFT (24)
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#define LPUART_BAUD_OSR(x) ((((uint32_t)(x)) << 24) & 0x1F000000)
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#define LPUART_BAUD_SBR_MASK (0x1FFF)
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#define LPUART_BAUD_SBR_SHIFT (0U)
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#define LPUART_BAUD_SBR(x) (((uint32_t)(x)) & 0x1FFF)
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#define LPUART_BAUD_M10_MASK (0x20000000U)
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#define LPUART_BAUD_SBNS_MASK (0x2000U)
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