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	According to the PPC reference implementation the udelay() function is responsible for resetting the watchdog timer as frequently as needed. Most other architectures do not meet that requirement, so long-running operations might result in a watchdog reset. This patch adds a generic udelay() function which takes care of resetting the watchdog before calling an architecture-specific __udelay(). Signed-off-by: Ingo van Lil <inguin@gmx.de>
		
			
				
	
	
		
			129 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			129 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * (C) Copyright 2002
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|  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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|  * Marius Groeger <mgroeger@sysgo.de>
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|  *
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|  * (C) Copyright 2002
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|  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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|  * Alex Zuepke <azu@sysgo.de>
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| #include <common.h>
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| #include <asm/arch/pxa-regs.h>
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| #include <div64.h>
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| 
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| #ifdef CONFIG_USE_IRQ
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| #error: interrupts not implemented yet
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| #endif
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| 
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| #if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
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| #define TIMER_FREQ_HZ 3250000
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| #elif defined(CONFIG_PXA250)
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| #define TIMER_FREQ_HZ 3686400
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| #else
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| #error "Timer frequency unknown - please config PXA CPU type"
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| #endif
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| 
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| static inline unsigned long long tick_to_time(unsigned long long tick)
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| {
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| 	tick *= CONFIG_SYS_HZ;
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| 	do_div(tick, TIMER_FREQ_HZ);
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| 	return tick;
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| }
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| 
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| static inline unsigned long long us_to_tick(unsigned long long us)
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| {
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| 	us = us * TIMER_FREQ_HZ + 999999;
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| 	do_div(us, 1000000);
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| 	return us;
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| }
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| 
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| int timer_init (void)
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| {
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| 	reset_timer();
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| 
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| 	return 0;
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| }
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| 
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| void reset_timer (void)
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| {
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| 	reset_timer_masked ();
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| }
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| 
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| ulong get_timer (ulong base)
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| {
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| 	return get_timer_masked () - base;
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| }
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| 
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| void set_timer (ulong t)
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| {
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| 	/* nop */
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| }
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| 
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| void __udelay (unsigned long usec)
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| {
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| 	udelay_masked (usec);
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| }
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| 
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| 
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| void reset_timer_masked (void)
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| {
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| 	OSCR = 0;
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| }
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| 
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| ulong get_timer_masked (void)
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| {
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| 	return tick_to_time(get_ticks());
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| }
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| 
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| void udelay_masked (unsigned long usec)
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| {
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| 	unsigned long long tmp;
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| 	ulong tmo;
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| 
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| 	tmo = us_to_tick(usec);
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| 	tmp = get_ticks() + tmo;	/* get current timestamp */
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| 
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| 	while (get_ticks() < tmp)	/* loop till event */
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| 		 /*NOP*/;
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| 
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| }
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| 
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| /*
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|  * This function is derived from PowerPC code (read timebase as long long).
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|  * On ARM it just returns the timer value.
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|  */
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| unsigned long long get_ticks(void)
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| {
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| 	return OSCR;
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| }
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| 
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| /*
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|  * This function is derived from PowerPC code (timebase clock frequency).
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|  * On ARM it returns the number of timer ticks per second.
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|  */
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| ulong get_tbclk (void)
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| {
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| 	ulong tbclk;
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| 	tbclk = TIMER_FREQ_HZ;
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| 	return tbclk;
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| }
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