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https://source.denx.de/u-boot/u-boot.git
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b02e4044ff
These have now landed upstream. The naming is different and in one case the function signature has changed. Update the code to match. This applies the following upstream commits by Thierry Reding <treding@nvidia.com> : 604e61e fdt: Add functions to retrieve strings 8702bd1 fdt: Add a function to get the index of a string 2218387 fdt: Add a function to count strings Signed-off-by: Simon Glass <sjg@chromium.org>
169 lines
3.6 KiB
C
169 lines
3.6 KiB
C
/*
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* (C) Copyright 2015 Marek Vasut <marex@denx.de>
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*
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* DesignWare APB GPIO driver
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <malloc.h>
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#include <asm/arch/gpio.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <dm.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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#include <dm/root.h>
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#include <errno.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define GPIO_SWPORTA_DR 0x00
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#define GPIO_SWPORTA_DDR 0x04
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#define GPIO_INTEN 0x30
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#define GPIO_INTMASK 0x34
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#define GPIO_INTTYPE_LEVEL 0x38
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#define GPIO_INT_POLARITY 0x3c
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#define GPIO_INTSTATUS 0x40
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#define GPIO_PORTA_DEBOUNCE 0x48
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#define GPIO_PORTA_EOI 0x4c
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#define GPIO_EXT_PORTA 0x50
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struct gpio_dwapb_platdata {
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const char *name;
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int bank;
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int pins;
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fdt_addr_t base;
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};
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static int dwapb_gpio_direction_input(struct udevice *dev, unsigned pin)
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{
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struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
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clrbits_le32(plat->base + GPIO_SWPORTA_DDR, 1 << pin);
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return 0;
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}
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static int dwapb_gpio_direction_output(struct udevice *dev, unsigned pin,
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int val)
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{
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struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
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setbits_le32(plat->base + GPIO_SWPORTA_DDR, 1 << pin);
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if (val)
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setbits_le32(plat->base + GPIO_SWPORTA_DR, 1 << pin);
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else
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clrbits_le32(plat->base + GPIO_SWPORTA_DR, 1 << pin);
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return 0;
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}
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static int dwapb_gpio_get_value(struct udevice *dev, unsigned pin)
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{
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struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
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return !!(readl(plat->base + GPIO_EXT_PORTA) & (1 << pin));
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}
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static int dwapb_gpio_set_value(struct udevice *dev, unsigned pin, int val)
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{
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struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
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if (val)
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setbits_le32(plat->base + GPIO_SWPORTA_DR, 1 << pin);
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else
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clrbits_le32(plat->base + GPIO_SWPORTA_DR, 1 << pin);
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return 0;
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}
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static const struct dm_gpio_ops gpio_dwapb_ops = {
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.direction_input = dwapb_gpio_direction_input,
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.direction_output = dwapb_gpio_direction_output,
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.get_value = dwapb_gpio_get_value,
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.set_value = dwapb_gpio_set_value,
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};
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static int gpio_dwapb_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *priv = dev_get_uclass_priv(dev);
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struct gpio_dwapb_platdata *plat = dev->platdata;
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if (!plat)
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return 0;
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priv->gpio_count = plat->pins;
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priv->bank_name = plat->name;
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return 0;
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}
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static int gpio_dwapb_bind(struct udevice *dev)
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{
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struct gpio_dwapb_platdata *plat = dev_get_platdata(dev);
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const void *blob = gd->fdt_blob;
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struct udevice *subdev;
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fdt_addr_t base;
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int ret, node, bank = 0;
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/* If this is a child device, there is nothing to do here */
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if (plat)
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return 0;
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base = fdtdec_get_addr(blob, dev->of_offset, "reg");
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if (base == FDT_ADDR_T_NONE) {
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debug("Can't get the GPIO register base address\n");
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return -ENXIO;
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}
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for (node = fdt_first_subnode(blob, dev->of_offset);
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node > 0;
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node = fdt_next_subnode(blob, node)) {
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if (!fdtdec_get_bool(blob, node, "gpio-controller"))
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continue;
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plat = NULL;
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plat = calloc(1, sizeof(*plat));
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if (!plat)
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return -ENOMEM;
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plat->base = base;
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plat->bank = bank;
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plat->pins = fdtdec_get_int(blob, node, "snps,nr-gpios", 0);
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plat->name = fdt_stringlist_get(blob, node, "bank-name", 0,
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NULL);
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if (ret)
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goto err;
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ret = device_bind(dev, dev->driver, plat->name,
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plat, -1, &subdev);
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if (ret)
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goto err;
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subdev->of_offset = node;
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bank++;
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}
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return 0;
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err:
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free(plat);
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return ret;
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}
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static const struct udevice_id gpio_dwapb_ids[] = {
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{ .compatible = "snps,dw-apb-gpio" },
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{ }
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};
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U_BOOT_DRIVER(gpio_dwapb) = {
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.name = "gpio-dwapb",
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.id = UCLASS_GPIO,
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.of_match = gpio_dwapb_ids,
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.ops = &gpio_dwapb_ops,
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.bind = gpio_dwapb_bind,
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.probe = gpio_dwapb_probe,
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};
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