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	Add clock/reset definitions for display-related peripherals, including the display engine, TCONs, and DSI and HDMI encoders, so those drivers can be converted to DM clock consumers instead of directly manipulating the CCU registers. Signed-off-by: Samuel Holland <samuel@sholland.org>
		
			
				
	
	
		
			67 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			67 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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| /*
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|  * Copyright (C) 2018 Amarula Solutions.
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|  * Author: Jagan Teki <jagan@amarulasolutions.com>
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|  */
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| 
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| #include <common.h>
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| #include <clk-uclass.h>
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| #include <dm.h>
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| #include <errno.h>
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| #include <clk/sunxi.h>
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| #include <dt-bindings/clock/sun8i-v3s-ccu.h>
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| #include <dt-bindings/reset/sun8i-v3s-ccu.h>
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| #include <linux/bitops.h>
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| 
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| static struct ccu_clk_gate v3s_gates[] = {
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| 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
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| 	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
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| 	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
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| 	[CLK_BUS_SPI0]		= GATE(0x060, BIT(20)),
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| 	[CLK_BUS_OTG]		= GATE(0x060, BIT(24)),
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| 
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| 	[CLK_BUS_TCON0]		= GATE(0x064, BIT(4)),
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| 	[CLK_BUS_DE]		= GATE(0x064, BIT(12)),
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| 
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| 	[CLK_BUS_PIO]		= GATE(0x068, BIT(5)),
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| 
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| 	[CLK_BUS_I2C0]		= GATE(0x06c, BIT(0)),
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| 	[CLK_BUS_I2C1]		= GATE(0x06c, BIT(1)),
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| 	[CLK_BUS_UART0]		= GATE(0x06c, BIT(16)),
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| 	[CLK_BUS_UART1]		= GATE(0x06c, BIT(17)),
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| 	[CLK_BUS_UART2]		= GATE(0x06c, BIT(18)),
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| 
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| 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
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| 
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| 	[CLK_USB_PHY0]          = GATE(0x0cc, BIT(8)),
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| 
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| 	[CLK_DE]		= GATE(0x104, BIT(31)),
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| 	[CLK_TCON0]		= GATE(0x118, BIT(31)),
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| };
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| 
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| static struct ccu_reset v3s_resets[] = {
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| 	[RST_USB_PHY0]		= RESET(0x0cc, BIT(0)),
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| 
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| 	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
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| 	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
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| 	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
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| 	[RST_BUS_SPI0]		= RESET(0x2c0, BIT(20)),
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| 	[RST_BUS_OTG]		= RESET(0x2c0, BIT(24)),
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| 
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| 	[RST_BUS_TCON0]		= RESET(0x2c4, BIT(4)),
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| 	[RST_BUS_DE]		= RESET(0x2c4, BIT(12)),
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| 
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| 	[RST_BUS_I2C0]		= RESET(0x2d8, BIT(0)),
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| 	[RST_BUS_I2C1]		= RESET(0x2d8, BIT(1)),
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| 	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
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| 	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
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| 	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
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| };
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| 
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| const struct ccu_desc v3s_ccu_desc = {
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| 	.gates = v3s_gates,
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| 	.resets = v3s_resets,
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| 	.num_gates = ARRAY_SIZE(v3s_gates),
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| 	.num_resets = ARRAY_SIZE(v3s_resets),
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| };
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