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u-boot/arch/arm/mach-socfpga/include/mach
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Siew Chin Lim 96fe4f6485 arm: socfpga: smc: Add function to get usercode 
Add function to send mailbox command via SMC to get usercode from SDM.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-04-08 17:29:13 +08:00
..
base_addr_a10.h
arm: socfpga: Add onchip RAM size macro
2020-03-31 02:52:38 +02:00
base_addr_ac5.h
arm: socfpga: Add onchip RAM size macro
2020-03-31 02:52:38 +02:00
base_addr_s10.h
arm: socfpga: agilex: Add base address for Intel Agilex SoC
2020-01-07 14:38:33 +01:00
boot0.h
ARM: socfpga: Add boot trampoline for Arria10
2018-05-08 21:08:42 +02:00
clock_manager_agilex.h
arm: socfpga: agilex: Add clock wrapper functions
2020-01-07 14:38:33 +01:00
clock_manager_arria10.h
arm: socfpga: Move Stratix10 and Agilex clock manager common code
2021-04-08 17:29:12 +08:00
clock_manager_gen5.h
arm: socfpga: Move Stratix10 and Agilex clock manager common code
2021-04-08 17:29:12 +08:00
clock_manager_s10.h
arm: socfpga: Move Stratix10 and Agilex clock manager common code
2021-04-08 17:29:12 +08:00
clock_manager_soc64.h
arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz
2020-01-07 14:38:33 +01:00
clock_manager.h
arm: socfpga: Changed to store QSPI reference clock in kHz
2021-04-08 17:29:12 +08:00
firewall.h
common: Drop linux/bitops.h from common header
2020-05-18 21:19:23 -04:00
fpga_manager_arria10.h
common: Drop linux/bitops.h from common header
2020-05-18 21:19:23 -04:00
fpga_manager_gen5.h
common: Drop linux/bitops.h from common header
2020-05-18 21:19:23 -04:00
fpga_manager.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
freeze_controller.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
gpio.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
handoff_soc64.h
arm: socfpga: Restructure Stratix10 and Agilex handoff code
2021-04-08 17:29:12 +08:00
mailbox_s10.h
arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)
2021-03-08 10:59:10 +08:00
misc.h
arm: socfpga: soc64: Check FPGA Config status register before bridge reset
2020-09-03 11:26:07 +08:00
nic301.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
pinmux.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
reset_manager_arria10.h
common: Drop linux/bitops.h from common header
2020-05-18 21:19:23 -04:00
reset_manager_gen5.h
arm: socfpga: Convert reset manager from struct to defines
2020-01-07 14:38:33 +01:00
reset_manager_soc64.h
arm: socfpga: soc64: Show reset state in SPL
2020-10-09 17:53:11 +08:00
reset_manager.h
Prepare v2021.04-rc4
2021-03-15 12:15:38 -04:00
scan_manager.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00
scu.h
ARM: socfpga: Fix Documentation errors in scu_registers
2018-05-18 10:30:47 +02:00
sdram_arria10.h
common: Drop linux/bitops.h from common header
2020-05-18 21:19:23 -04:00
sdram_gen5.h
ddr: altera: Add DDR2 support to Gen5 driver
2020-02-05 03:01:57 +01:00
sdram.h
ARM: socfpga: Add DDR driver for Arria 10
2018-05-18 10:30:47 +02:00
secure_reg_helper.h
arm: socfpga: Add secure register access helper functions for SoC 64bits
2021-01-15 17:48:36 +08:00
secure_vab.h
arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)
2021-03-08 10:59:10 +08:00
smc_api.h
arm: socfpga: smc: Add function to get usercode
2021-04-08 17:29:13 +08:00
system_manager_arria10.h
arm: socfpga: Convert system manager from struct to defines
2020-01-07 14:38:33 +01:00
system_manager_gen5.h
arm: socfpga: fix Gen5 enable of EMAC via FPGA
2020-10-21 11:45:54 +08:00
system_manager_soc64.h
arm: socfpga: Changed to store QSPI reference clock in kHz
2021-04-08 17:29:12 +08:00
system_manager.h
arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64
2021-03-08 10:59:10 +08:00
timer.h
SPDX: Convert all of our single license tags to Linux Kernel style
2018-05-07 09:34:12 -04:00