Marek Vasut 0c1b81bdf3 ddr: altera: Clean up of delay_for_n_mem_clocks() part 4 ...

Simplify the loop code, optimizing compiler can deal with this.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>

2015-08-08 14:14:24 +02:00

..

altera

ddr: altera: Clean up of delay_for_n_mem_clocks() part 4

2015-08-08 14:14:24 +02:00

fsl

drivers/ddr/fsl: Adjust bstopre value

2015-08-03 12:06:38 -07:00

marvell

arm: mvebu: a38x: Use correct PEX register access macros

2015-07-23 10:39:25 +02:00