mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2025-11-03 18:01:41 +01:00
8c103c33fb
Now that Linux has accepted these tags, move the device tree files in U-Boot over to use them. Signed-off-by: Simon Glass <sjg@chromium.org>
594 lines
12 KiB
Plaintext
594 lines
12 KiB
Plaintext
/dts-v1/;
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#include <dt-bindings/gpio/x86-gpio.h>
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#include <dt-bindings/sound/azalia.h>
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#include <pci_ids.h>
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/include/ "skeleton.dtsi"
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/include/ "keyboard.dtsi"
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/include/ "serial.dtsi"
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/include/ "reset.dtsi"
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/include/ "rtc.dtsi"
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#include "tsc_timer.dtsi"
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#include "smbios.dtsi"
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/ {
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model = "Google Link";
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compatible = "google,link", "intel,celeron-ivybridge";
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aliases {
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spi0 = &spi;
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usb0 = &usb_0;
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usb1 = &usb_1;
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};
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config {
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silent_console = <0>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "intel,core-gen3";
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reg = <0>;
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intel,apic-id = <0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "intel,core-gen3";
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reg = <1>;
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intel,apic-id = <1>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "intel,core-gen3";
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reg = <2>;
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intel,apic-id = <2>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "intel,core-gen3";
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reg = <3>;
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intel,apic-id = <3>;
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};
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};
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chosen {
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stdout-path = "/serial";
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};
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keyboard {
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intel,duplicate-por;
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};
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pch_pinctrl {
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compatible = "intel,x86-pinctrl";
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bootph-all;
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reg = <0 0>;
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gpio_a0 {
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gpio-offset = <0 0>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_a1 {
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gpio-offset = <0>;
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mode-gpio;
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direction = <PIN_OUTPUT>;
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output-value = <1>;
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};
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gpio_a3 {
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gpio-offset = <0 3>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_a5 {
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gpio-offset = <0 5>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_a6 {
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gpio-offset = <0 6>;
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mode-gpio;
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direction = <PIN_OUTPUT>;
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output-value = <1>;
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};
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gpio_a7 {
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gpio-offset = <0 7>;
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mode-gpio;
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direction = <PIN_INPUT>;
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invert;
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};
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gpio_a8 {
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gpio-offset = <0 8>;
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mode-gpio;
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direction = <PIN_INPUT>;
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invert;
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};
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gpio_a9 {
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gpio-offset = <0 9>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_a10 {
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bootph-all;
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gpio-offset = <0 10>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_a11 {
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gpio-offset = <0 11>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_a12 {
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gpio-offset = <0 12>;
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mode-gpio;
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direction = <PIN_INPUT>;
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invert;
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};
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gpio_a14 {
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gpio-offset = <0 14>;
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mode-gpio;
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direction = <PIN_INPUT>;
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invert;
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};
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gpio_a15 {
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gpio-offset = <0 15>;
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mode-gpio;
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direction = <PIN_INPUT>;
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invert;
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};
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gpio_a21 {
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gpio-offset = <0 21>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_a24 {
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gpio-offset = <0 24>;
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mode-gpio;
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output-value = <0>;
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direction = <PIN_OUTPUT>;
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};
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gpio_a28 {
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gpio-offset = <0 28>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_b4 {
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gpio-offset = <0x30 4>;
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mode-gpio;
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direction = <PIN_OUTPUT>;
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output-value = <1>;
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};
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gpio_b9 {
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bootph-all;
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gpio-offset = <0x30 9>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_b10 {
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bootph-all;
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gpio-offset = <0x30 10>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_b11 {
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bootph-all;
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gpio-offset = <0x30 11>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_b25 {
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gpio-offset = <0x30 25>;
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mode-gpio;
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direction = <PIN_INPUT>;
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};
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gpio_b28 {
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gpio-offset = <0x30 28>;
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mode-gpio;
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direction = <PIN_OUTPUT>;
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output-value = <1>;
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};
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};
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pci {
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compatible = "pci-x86";
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#address-cells = <3>;
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#size-cells = <2>;
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bootph-all;
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ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000
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0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000
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0x01000000 0x0 0x1000 0x1000 0 0xefff>;
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northbridge@0,0 {
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reg = <0x00000000 0 0 0 0>;
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bootph-all;
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compatible = "intel,bd82x6x-northbridge";
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board-id-gpios = <&gpio_b 9 0>, <&gpio_b 10 0>,
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<&gpio_b 11 0>, <&gpio_a 10 0>;
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spd {
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bootph-all;
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#address-cells = <1>;
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#size-cells = <0>;
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elpida_4Gb_1600_x16 {
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bootph-all;
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reg = <0>;
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data = [92 10 0b 03 04 19 02 02
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03 52 01 08 0a 00 fe 00
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69 78 69 3c 69 11 18 81
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20 08 3c 3c 01 40 83 81
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 0f 11 42 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 02 fe 00
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11 52 00 00 00 07 7f 37
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45 42 4a 32 30 55 47 36
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45 42 55 30 2d 47 4e 2d
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46 20 30 20 02 fe 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00];
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};
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samsung_4Gb_1600_1.35v_x16 {
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bootph-all;
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reg = <1>;
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data = [92 11 0b 03 04 19 02 02
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03 11 01 08 0a 00 fe 00
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69 78 69 3c 69 11 18 81
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f0 0a 3c 3c 01 40 83 01
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00 80 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 0f 11 02 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 80 ce 01
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00 00 00 00 00 00 6a 04
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4d 34 37 31 42 35 36 37
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34 42 48 30 2d 59 4b 30
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20 20 00 00 80 ce 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00];
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};
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micron_4Gb_1600_1.35v_x16 {
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reg = <2>;
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data = [92 11 0b 03 04 19 02 02
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03 11 01 08 0a 00 fe 00
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69 78 69 3c 69 11 18 81
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20 08 3c 3c 01 40 83 05
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 0f 01 02 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 80 2c 00
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00 00 00 00 00 00 ad 75
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34 4b 54 46 32 35 36 36
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34 48 5a 2d 31 47 36 45
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31 20 45 31 80 2c 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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00 00 00 00 00 00 00 00
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ff ff ff ff ff ff ff ff
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ff ff ff ff ff ff ff ff
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ff ff ff ff ff ff ff ff
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ff ff ff ff ff ff ff ff
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ff ff ff ff ff ff ff ff
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ff ff ff ff ff ff ff ff
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ff ff ff ff ff ff ff ff
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ff ff ff ff ff ff ff ff
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ff ff ff ff ff ff ff ff
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ff ff ff ff ff ff ff ff];
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};
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};
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};
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gma@2,0 {
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reg = <0x00001000 0 0 0 0>;
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compatible = "intel,gma";
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intel,dp_hotplug = <0 0 0x06>;
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intel,panel-port-select = <1>;
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intel,panel-power-cycle-delay = <6>;
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intel,panel-power-up-delay = <2000>;
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intel,panel-power-down-delay = <500>;
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intel,panel-power-backlight-on-delay = <2000>;
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intel,panel-power-backlight-off-delay = <2000>;
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intel,cpu-backlight = <0x00000200>;
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intel,pch-backlight = <0x04000000>;
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};
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me@16,0 {
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reg = <0x0000b000 0 0 0 0>;
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compatible = "intel,me";
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bootph-all;
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};
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usb_1: usb@1a,0 {
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reg = <0x0000d000 0 0 0 0>;
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compatible = "ehci-pci";
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};
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hda@1b,0 {
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reg = <0x0000d800 0 0 0 0>;
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compatible = "intel,bd82x6x-hda";
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/* These correspond to the Intel HDA specification */
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beep-verbs = <
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0x00170500 /* power up codec */
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0x00270500 /* power up DAC */
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0x00b70500 /* power up speaker */
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0x00b70740 /* enable speaker out */
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0x00b78d00 /* enable EAPD pin */
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0x00b70c02 /* set EAPD pin */
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0x0143b013>; /* beep volume */
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codecs {
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creative_codec: creative-ca0132 {
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vendor-id = <PCI_VENDOR_ID_CREATIVE>;
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device-id = <PCI_DEVICE_ID_CREATIVE_CA01322>;
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};
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intel_hdmi: hdmi {
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vendor-id = <PCI_VENDOR_ID_INTEL>;
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device-id = <PCI_DEVICE_ID_INTEL_COUGARPOINT_HDMI>;
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};
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};
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};
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usb_0: usb@1d,0 {
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reg = <0x0000e800 0 0 0 0>;
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compatible = "ehci-pci";
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};
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pch@1f,0 {
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reg = <0x0000f800 0 0 0 0>;
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compatible = "intel,bd82x6x", "intel,pch9";
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bootph-all;
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#address-cells = <1>;
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#size-cells = <1>;
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intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b
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0x80 0x80 0x80 0x80>;
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intel,gpi-routing = <0 0 0 0 0 0 0 2
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1 0 0 0 0 0 0 0>;
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/* Enable EC SMI source */
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intel,alt-gp-smi-enable = <0x0100>;
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spi: spi {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "intel,ich9-spi";
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bootph-all;
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spi-flash@0 {
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#size-cells = <1>;
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#address-cells = <1>;
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bootph-all;
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reg = <0>;
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m25p,fast-read;
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compatible = "winbond,w25q64",
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"jedec,spi-nor";
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memory-map = <0xff800000 0x00800000>;
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rw-mrc-cache {
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label = "rw-mrc-cache";
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reg = <0x003e0000 0x00010000>;
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bootph-all;
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};
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};
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};
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gpio_a: gpioa {
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compatible = "intel,ich6-gpio";
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bootph-all;
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0 0x10>;
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bank-name = "A";
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};
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gpio_b: gpiob {
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compatible = "intel,ich6-gpio";
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bootph-all;
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0x30 0x10>;
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bank-name = "B";
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};
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gpio_c: gpioc {
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compatible = "intel,ich6-gpio";
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bootph-all;
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0x40 0x10>;
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bank-name = "C";
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};
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lpc {
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compatible = "intel,bd82x6x-lpc";
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#address-cells = <1>;
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#size-cells = <0>;
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bootph-all;
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intel,gen-dec = <0x800 0xfc 0x900 0xfc>;
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cros-ec@200 {
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compatible = "google,cros-ec";
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reg = <0x204 1 0x200 1 0x880 0x80>;
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/*
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* Describes the flash memory within
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* the EC
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*/
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#address-cells = <1>;
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#size-cells = <1>;
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flash@8000000 {
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reg = <0x08000000 0x20000>;
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erase-value = <0xff>;
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};
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};
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};
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};
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sata@1f,2 {
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compatible = "intel,pantherpoint-ahci";
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reg = <0x0000fa00 0 0 0 0>;
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bootph-all;
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intel,sata-mode = "ahci";
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intel,sata-port-map = <1>;
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intel,sata-port0-gen3-tx = <0x00880a7f>;
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};
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smbus: smbus@1f,3 {
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compatible = "intel,ich-i2c";
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reg = <0x0000fb00 0 0 0 0>;
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bootph-all;
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};
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};
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tpm {
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reg = <0xfed40000 0x5000>;
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compatible = "infineon,slb9635lpc";
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};
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microcode {
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bootph-all;
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update@0 {
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bootph-all;
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#include "microcode/m12306a9_0000001b.dtsi"
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};
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};
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};
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&creative_codec {
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verbs = <
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/**
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* Malcolm Setup. These correspond to the Intel HDA
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* specification.
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*/
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0x01570d09 0x01570c23 0x01570a01 0x01570df0
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0x01570efe 0x01570775 0x015707d3 0x01570709
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0x01570753 0x015707d4 0x015707ef 0x01570775
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0x015707d3 0x01570709 0x01570702 0x01570737
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0x01570778 0x01553cce 0x015575c9 0x01553dce
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0x0155b7c9 0x01570de8 0x01570efe 0x01570702
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0x01570768 0x01570762 0x01553ace 0x015546c9
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0x01553bce 0x0155e8c9 0x01570d49 0x01570c88
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0x01570d20 0x01570e19 0x01570700 0x01571a05
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0x01571b29 0x01571a04 0x01571b29 0x01570a01
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/* Pin Widget Verb Table */
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/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x144dc0c2 */
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AZALIA_SUBVENDOR(0x0, 0x144dc0c2)
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/*
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* Pin Complex (NID 0x0B) Port-G Analog Unknown
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* Speaker at Int N/A
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*/
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AZALIA_PIN_CFG(0x0, 0x0b, 0x901700f0)
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/* Pin Complex (NID 0x0C) N/C */
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AZALIA_PIN_CFG(0x0, 0x0c, 0x70f000f0)
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|
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/* Pin Complex (NID 0x0D) N/C */
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AZALIA_PIN_CFG(0x0, 0x0d, 0x70f000f0)
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|
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/* Pin Complex (NID 0x0E) N/C */
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AZALIA_PIN_CFG(0x0, 0x0e, 0x70f000f0)
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|
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/* Pin Complex (NID 0x0F) N/C */
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AZALIA_PIN_CFG(0x0, 0x0f, 0x70f000f0)
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|
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/* Pin Complex (NID 0x10) Port-D 1/8 Black HP Out at Ext Left */
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AZALIA_PIN_CFG(0x0, 0x10, 0x032110f0)
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|
|
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/* Pin Complex (NID 0x11) Port-B Click Mic */
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AZALIA_PIN_CFG(0x0, 0x11, 0x90a700f0)
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|
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/* Pin Complex (NID 0x12) Port-C Combo Jack Mic or D-Mic */
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AZALIA_PIN_CFG(0x0, 0x12, 0x03a110f0)
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|
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/* Pin Complex (NID 0x13) What you hear */
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|
AZALIA_PIN_CFG(0x0, 0x13, 0x90d600f0)>;
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|
};
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|
|
|
&intel_hdmi {
|
|
verbs = <
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|
/* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x80860101 */
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AZALIA_SUBVENDOR(0x3, 0x80860101)
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|
|
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/* Pin Complex (NID 0x05) Digital Out at Int HDMI */
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AZALIA_PIN_CFG(0x3, 0x05, 0x18560010)
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|
|
|
/* Pin Complex (NID 0x06) Digital Out at Int HDMI */
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AZALIA_PIN_CFG(0x3, 0x06, 0x18560020)
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|
|
|
/* Pin Complex (NID 0x07) Digital Out at Int HDMI */
|
|
AZALIA_PIN_CFG(0x3, 0x07, 0x18560030)>;
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|
};
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