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2c5f5457bc
Disable all 3 wdogs on AIPS2 and unmask SRC reset trigger for WDOG3-5 Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
23 lines
484 B
C
23 lines
484 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2022 NXP
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*/
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#ifndef __ASM_ARCH_IMX9_REGS_H__
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#define __ASM_ARCH_IMX9_REGS_H__
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#define ARCH_MXC
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#define IOMUXC_BASE_ADDR 0x443C0000UL
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#define CCM_BASE_ADDR 0x44450000UL
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#define CCM_CCGR_BASE_ADDR 0x44458000UL
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#define SYSCNT_CTRL_BASE_ADDR 0x44290000
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#define ANATOP_BASE_ADDR 0x44480000UL
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#define WDG3_BASE_ADDR 0x42490000UL
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#define WDG4_BASE_ADDR 0x424a0000UL
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#define WDG5_BASE_ADDR 0x424b0000UL
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#endif
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