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	Once the Davinci watchdog has been enabled, the timeout value cannot be changed. If the timeout in use is long, it can take a long time for card to reset. By writing an invalid service key, we can trigger an immediate reset. Signed-off-by: Thomas Lange <thomas@corelatus.se>
		
			
				
	
	
		
			82 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			82 lines
		
	
	
		
			1.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
| /*
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|  * Processor reset using WDT for TI TMS320DM644x SoC.
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|  *
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|  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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|  *
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|  * -----------------------------------------------------
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| .globl reset_cpu
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| reset_cpu:
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| 	ldr	r0, WDT_TGCR
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| 	mov	r1, $0x08
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| 	str	r1, [r0]
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| 	ldr	r1, [r0]
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| 	orr	r1, r1, $0x03
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| 	str	r1, [r0]
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| 	mov	r1, $0
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| 	ldr	r0, WDT_TIM12
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| 	str	r1, [r0]
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| 	ldr	r0, WDT_TIM34
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| 	str	r1, [r0]
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| 	ldr	r0, WDT_PRD12
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| 	str	r1, [r0]
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| 	ldr	r0, WDT_PRD34
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| 	str	r1, [r0]
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| 	ldr	r0, WDT_TCR
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| 	ldr	r1, [r0]
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| 	orr	r1, r1, $0x40
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| 	str	r1, [r0]
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| 	ldr	r0, WDT_WDTCR
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| 	ldr	r1, [r0]
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| 	orr	r1, r1, $0x4000
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| 	str	r1, [r0]
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| 	ldr	r1, WDTCR_VAL1
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| 	str	r1, [r0]
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| 	ldr	r1, WDTCR_VAL2
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| 	str	r1, [r0]
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| 	/* Write an invalid value to the WDKEY field to trigger
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| 	 * an immediate watchdog reset */
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| 	mov     r1, $0x4000
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| 	str     r1, [r0]
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| 	nop
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| 	nop
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| 	nop
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| 	nop
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| reset_cpu_loop:
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| 	b	reset_cpu_loop
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| 
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| WDT_TGCR:
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| 	.word	0x01c21c24
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| WDT_TIM12:
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| 	.word	0x01c21c10
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| WDT_TIM34:
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| 	.word	0x01c21c14
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| WDT_PRD12:
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| 	.word	0x01c21c18
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| WDT_PRD34:
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| 	.word	0x01c21c1c
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| WDT_TCR:
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| 	.word	0x01c21c20
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| WDT_WDTCR:
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| 	.word	0x01c21c28
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| WDTCR_VAL1:
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| 	.word	0xa5c64000
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| WDTCR_VAL2:
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| 	.word	0xda7e4000
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