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e6f61622d3
This restores support for configuring the timing mode based on the
ddr_topology. This was originally implemented in commit 90bcc3d38d2b
("driver/ddr: Add support for setting timing in hws_topology_map") but
was removed as part of the upstream sync.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Update from original Marvell U-Boot to mainline U-Boot: ------------------------------------------------------- The resulting image including the SPL binary with the full DDR setup is "u-boot-spl.kwb". To update the SPI NOR flash, please use the following command: => sf probe;tftpboot 2000000 db-88f6820-gp/u-boot-spl.kwb;\ sf update 2000000 0 60000 Note that the original Marvell U-Boot seems to have problems with the "sf update" command. This does not work reliable. So here this command should be used: => sf probe;tftpboot 2000000 db-88f6820-gp/u-boot-spl.kwb;\ sf erase 0 60000;sf write 2000000 0 60000