Chin Liang See 8faeab9304 arm: socfpga: stratix10: Add base address map for Statix10 SoC ...

Add the base address map for Stratix10 SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

2018-04-17 11:39:48 +02:00

..

include/mach

arm: socfpga: stratix10: Add base address map for Statix10 SoC

2018-04-17 11:39:48 +02:00

board.c

arm: socfpga: Introduce common board code

2015-12-20 03:36:51 +01:00

clock_manager_arria10.c

SOCFPGA: clock manager: implement dw_spi_get_clk function

2018-01-26 11:25:49 +05:30

clock_manager_gen5.c

ARM: socfpga: Convert callers of cm_write_with_phase for wait_for_bit_le32

2018-01-26 13:08:03 -05:00

clock_manager.c

Merge git://git.denx.de/u-boot-spi

2018-01-26 07:46:34 -05:00

fpga_manager.c

treewide: replace #include <asm/errno.h> with <linux/errno.h>

2016-09-23 17:55:42 -04:00

freeze_controller.c

treewide: replace #include <asm/errno.h> with <linux/errno.h>

2016-09-23 17:55:42 -04:00

Kconfig

ARM: socfpga: Add new CycloneV SoC Devboards DBM-SoC1 board

2018-02-26 14:06:02 +01:00

Makefile

arm: socfpga: Restructure FPGA driver in the preparation to support A10

2017-07-26 10:31:44 +02:00

misc_arria10.c

arm: socfpga: Add misc support for Arria 10

2017-05-18 11:33:18 +02:00

misc_gen5.c

libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>

2018-03-05 10:16:28 -05:00

misc.c

libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>

2018-03-05 10:16:28 -05:00

pinmux_arria10.c

arm: socfpga: Add pinmux for Arria 10

2017-05-18 11:33:18 +02:00

qts-filter.sh

qts-filter.sh: strip DOS line endings and handle continuation lines

2016-12-06 01:45:57 +01:00

reset_manager_arria10.c

wait_bit: use wait_for_bit_le32 and remove wait_for_bit

2018-01-24 12:03:43 +05:30

reset_manager_gen5.c

arm: socfpga: Restructure reset manager driver

2017-05-18 11:33:17 +02:00

reset_manager.c

arm: socfpga: Restructure reset manager driver

2017-05-18 11:33:17 +02:00

scan_manager.c

arm: socfpga: scan: Add code to get FPGA ID

2015-08-08 14:14:30 +02:00

spl.c

spl: eMMC/SD: Provide one __weak spl_boot_mode() function

2018-02-07 22:06:18 -05:00

system_manager_gen5.c

arm: socfpga: Restructure system manager

2017-05-18 11:33:17 +02:00

timer.c

ARM: socfpga: move SoC sources to mach-socfpga

2015-05-07 05:21:12 +02:00

wrap_iocsr_config.c

arm: socfpga: Switch to filtered QTS files

2015-08-23 11:56:20 +02:00

wrap_pinmux_config.c

arm: socfpga: Make the pinmux table const u8

2015-08-23 11:56:20 +02:00

wrap_pll_config.c

arm: socfpga: set the mpuclk divider in the Altera group register

2017-02-08 02:19:11 +01:00

wrap_sdram_config.c

ddr: altera: Configuring SDRAM extra cycles timing parameters

2016-10-27 08:03:07 +02:00