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b3d69aa596
On some SoCs, depending on the boot device, the MMC clock block may be left in a weird state by the ROM code, in which no decent clock may be provided. Reset the related register to make sure a sane MMC clock is ready for the controller. Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>